TempleOSCD_150216.ISO
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@@ -70,7 +70,7 @@ ANSWERS:
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5) The R13 instruction takes one more byte because it is like $LK,"REG_RBP",A="MN:REG_RBP"$ in the ModR.
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6) The RAX instruction has a REX byte prefix to specify 64-bit size. So does the R8 instruction, but in the REX is also a flag to specify upper-8 reg. For EAX, there is no need of REX.
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6) The R8 instruction needs a REX byte prefix to specify upper-8 reg.
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7) You can access the lowest byte of any reg. You can access AH but not the second-to-lowest byte of ESI.
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@@ -6,8 +6,8 @@ F64 VGAPattern(I64 p)
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F64 start=tS;
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I64 plane;
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for (plane=1;plane<0x10;plane<<=1) {
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OutU8(VGA_SC_INDEX,VGA_MAP_MASK);
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OutU8(VGA_SC_DATA,plane);
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OutU8(VGAP_INDEX,VGAR_MAP_MASK);
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OutU8(VGAP_DATA,plane);
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MemSetI64(0xA0000,p,640*480/64);
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}
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return tS-start;
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@@ -23,10 +23,10 @@ U0 GrDemo()
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for (i=0;i<16;i++) {
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t=VGAPattern(0x5555555555555555);
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"$$GREEN$$Rate:$$RED$$%5.1f FPS$$FG$$"
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" $$GREEN$$Load@60Hz:$$RED$$%5.1f%%$$FG$$\n",1/t,100*t*60.0;
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" $$GREEN$$Load@30Hz:$$RED$$%5.1f%%$$FG$$\n",1/t,100*t*30.0;
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t=VGAPattern(0x3333333333333333);
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"$$GREEN$$Rate:$$RED$$%5.1f FPS$$FG$$"
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" $$GREEN$$Load@60Hz:$$RED$$%5.1f%%$$FG$$\n",1/t,100*t*60.0;
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" $$GREEN$$Load@30Hz:$$RED$$%5.1f%%$$FG$$\n",1/t,100*t*30.0;
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}
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Preempt(old_preempt);
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//<CTRL-ALT-f> will flush screen VGA cache.
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@@ -1,12 +1,12 @@
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/*$WW,1$
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$TR,"Main Compiler"$
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$TR-C,"Main Compiler"$
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$ID,2$The mini compiler is like the main compiler, except the main compiler's lexical analyser removes comments and does preprocessing. $LK,"Lex",A="MN:Lex"$(),$LK,"Echo",A="MN:Echo"$(ON).
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The main compiler generates $LK,"Intermediate Code",A="FF:::/Compiler/CmpDefs.HPP,IC_END"$ at the parser stage. See $LK,"PrsExpression",A="MN:PrsExpression"$(), $LK,"PrsStatement",A="MN:PrsStatement"$().
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The main compiler generates $LK,"Intermediate Code",A="FF:::/Compiler/CompilerA.HPP,IC_END"$ at the parser stage. See $LK,"PrsExpression",A="MN:PrsExpression"$(), $LK,"PrsStatement",A="MN:PrsStatement"$().
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The main compiler optimizes See $LK,"Intermediate Code Attributes",A="FF:D:/Compiler/CmpInit.CPP,ST_INTERMEDIATE_CODE"$, $LK,"Combining Consts",A="FF:::/Compiler/OptPass012.CPP,case IC_MUL"$, $LK,"Choosing Reg Vars",A="FF:::/Compiler/OptPass3.CPP,cmp.num_reg_vars"$. Set $LK,"OTrace",A="MN:OTrace"$(ON) to see the optimization stages.
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The main compiler optimizes See $LK,"Intermediate Code Attributes",A="MN:intermediate_code_table"$, $LK,"Combining Consts",A="FF:::/Compiler/OptPass012.CPP,case IC_MUL"$, $LK,"Choosing Reg Vars",A="FF:::/Compiler/OptPass3.CPP,cmp.num_reg_vars"$. Set $LK,"OTrace",A="MN:OTrace"$(ON) to see the optimization stages.
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The main compiler makes machine code in the back end. See $LK,"IC Struct",A="MN:CIntermediateCode"$, $LK,"LCCCompile",A="MN:LCCCompile"$ and $LK,"OptPass789",A="FF:::/Compiler/OptPass789.CPP,IC_MUL"$(), $LK,"BackEnd",A="FF:::/Compiler/Back1a.CPP,ICMul"$. Set $LK,"CTrace",A="MN:CTrace"$(ON) to see the output of the backend.
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The main compiler makes machine code in the back end. See $LK,"IC Struct",A="MN:CIntermediateCode"$, $LK,"LCCCompile",A="MN:LCCCompile"$ and $LK,"OptPass789A",A="FF:::/Compiler/OptPass789A.CPP,IC_MUL"$(), $LK,"BackEnd",A="FF:::/Compiler/BackA.CPP,ICMul"$. Set $LK,"CTrace",A="MN:CTrace"$(ON) to see the output of the backend.
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$ID,-2$
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$TR,"Mini Compiler"$
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$ID,2$For this mini compiler, some things you should know about 64-bit asm:
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@@ -216,8 +216,8 @@ U0 Main()
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throw;
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"$$RED$$This code is not efficient, but the compiler is simple.$$FG$$\n";
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Un(code,dst-code); //Unassemble the code we created.
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//$LK,"Call",A="MN:Call"$() is a function. See $LK,"_CALL",A="FF:::/Kernel/Utils1a.CPP,_CALL"$::
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//See also $LK,"CallInd",A="MN:CallInd"$(). See $LK,"_CALLIND",A="FF:::/Kernel/Utils1a.CPP,_CALLIND"$::
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//$LK,"Call",A="MN:Call"$() is a function. See $LK,"_CALL",A="FF:::/Kernel/KUtils.CPP,_CALL"$::
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//See also $LK,"CallInd",A="MN:CallInd"$(). See $LK,"_CALLIND",A="FF:::/Kernel/KUtils.CPP,_CALLIND"$::
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"$$LTBLUE$$Answer:%d$$FG$$\n",Call(code);
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} catch {
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"$$RED$$Error$$FG$$\n";
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@@ -19,8 +19,8 @@ U0 MGUpdate()
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{//Copy image to VGA memory
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//For better performance we could only write what's changed.
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//0xA0000 is slower than normal RAM.
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OutU8(VGA_SC_INDEX,VGA_MAP_MASK);
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OutU8(VGA_SC_DATA,0xF);//All color planes at once -- Black and White
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OutU8(VGAP_INDEX,VGAR_MAP_MASK);
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OutU8(VGAP_DATA,0xF);//All color planes at once -- Black and White
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MemCpy(0xA0000,image,sizeof(image));
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}
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@@ -5,12 +5,12 @@ TempleOS keeps a cached copy of VGA memory in
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$LK,"gr.screen_image",A="MN:CGrGlbls"$. See $LK,"GrUpdateVGAGraphics",A="MN:GrUpdateVGAGraphics"$.
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TempleOS used 4096 size pages for memory below addr 2 Meg
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and 2 Meg pages above two Meg. See $LK,"MemPageSize",A="MN:MemPageSize"$() and $LK,"INIT_MEMORY",A="FF:::/Kernel/Mem1a.CPP,SYS_INIT_MEM"$.
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and 2 Meg pages above two Meg. See $LK,"MemPageSize",A="MN:MemPageSize"$() and $LK,"INIT_MEMORY",A="FF:::/Kernel/MemA.CPP,SYS_INIT_MEM"$.
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*/
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U0 PageTableDemo1()
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{
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I64 *pte=MemPageTable(VGA_GRAPHIC_MEM_BASE),p0,p1;
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I64 *pte=MemPageTable(VGAM_GRAPHICS),p0,p1;
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"Page table entries for VGA screen memory\n";
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DocD(pte);
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PressAKey;
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@@ -19,8 +19,8 @@ U0 PageTableDemo1()
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p1=pte[1];
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pte[0]=p1;
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pte[1]=p0;
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InvlPg(VGA_GRAPHIC_MEM_BASE); //Invalidate translation look aside buffer (TLB).
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InvlPg(VGA_GRAPHIC_MEM_BASE+0x1000);
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InvlPg(VGAM_GRAPHICS); //Invalidate translation look aside buffer (TLB).
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InvlPg(VGAM_GRAPHICS+0x1000);
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//Use this if you wish to change
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//the page table reg.
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@@ -34,8 +34,8 @@ U0 PageTableDemo1()
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pte[0]=p0;
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pte[1]=p1;
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InvlPg(VGA_GRAPHIC_MEM_BASE);
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InvlPg(VGA_GRAPHIC_MEM_BASE+0x1000);
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InvlPg(VGAM_GRAPHICS);
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InvlPg(VGAM_GRAPHICS+0x1000);
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//<CTRL-ALT-f> will flush screen VGA cache.
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VGAFlush;
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@@ -43,6 +43,6 @@ U0 PageTableDemo1()
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PageTableDemo1;
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//See $LK,"MemBlks2MegAlloc",A="MN:MemBlks2MegAlloc"$(), $LK,"MemBlks2MegFree",A="MN:MemBlks2MegFree"$() for page aligned allocations.
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//See $LK,"Mem2MegAlloc",A="MN:Mem2MegAlloc"$(), $LK,"Mem2MegFree",A="MN:Mem2MegFree"$() for page aligned allocations.
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//See $LK,"CBlkPool",A="MN:CBlkPool"$, $LK,"CHeapCtrl",A="MN:CHeapCtrl"$, $LK,"sys_code_bp",A="MN:sys_code_bp"$ and $LK,"sys_data_bp",A="MN:sys_data_bp"$.
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//See $LK,"Memory Overview",A="FI:::/Doc/MemOverview.TXT"$ and $LK,"Memory Routines",A="HI:Memory"$.
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@@ -1,4 +1,4 @@
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I64 *addr=VGA_GRAPHIC_MEM_BASE,
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I64 *addr=VGAM_GRAPHICS,
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*pte_addr=MemPageTable(addr),
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err_code=0,
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*reported_fault_addr;
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@@ -4,7 +4,7 @@
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U0 PlotXY(I64 x,I64 y)
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{
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//Screen bits are reversed
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LBts(VGA_GRAPHIC_MEM_BASE,y*GR_WIDTH+x^7);
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LBts(VGAM_GRAPHICS,y*GR_WIDTH+x^7);
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}
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U0 Main()
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@@ -13,22 +13,22 @@ U0 Main()
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Bool old_preempt=Preempt(OFF);
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//This makes all 4 color planes active.
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OutU8(VGA_SC_INDEX,VGA_MAP_MASK);
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OutU8(VGA_SC_DATA,WHITE);
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MemSet(VGA_GRAPHIC_MEM_BASE,0,GR_WIDTH*GR_HEIGHT/8);
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OutU8(VGAP_INDEX,VGAR_MAP_MASK);
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OutU8(VGAP_DATA,WHITE);
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MemSet(VGAM_GRAPHICS,0,GR_WIDTH*GR_HEIGHT/8);
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OutU8(VGA_SC_INDEX,VGA_MAP_MASK);
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OutU8(VGA_SC_DATA,RED);
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OutU8(VGAP_INDEX,VGAR_MAP_MASK);
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OutU8(VGAP_DATA,RED);
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for (i=0;i<200;i++)
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PlotXY(i,i);
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OutU8(VGA_SC_INDEX,VGA_MAP_MASK);
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OutU8(VGA_SC_DATA,GREEN);
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OutU8(VGAP_INDEX,VGAR_MAP_MASK);
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OutU8(VGAP_DATA,GREEN);
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for (i=0;i<200;i++)
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PlotXY(100,i);
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OutU8(VGA_SC_INDEX,VGA_MAP_MASK);
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OutU8(VGA_SC_DATA,BLUE);
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OutU8(VGAP_INDEX,VGAR_MAP_MASK);
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OutU8(VGAP_DATA,BLUE);
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for (i=0;i<200;i++)
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PlotXY(200-i,i);
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/*If you want a mixed color select multiple planes
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@@ -14,7 +14,7 @@ U0 TimeIns()
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CPURep;
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shared_blks=1;
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bp=MemBlksUncachedAlloc(&shared_blks);
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bp=Mem2MegUncachedAlloc(&shared_blks);
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hc=HeapCtrlBPInit(bp,shared_blks<<12);
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uncached_I64=MAlloc(sizeof(I64),hc);
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@@ -39,7 +39,7 @@ U0 TimeIns()
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"because the loop overhead was not subtracted.$$FG$$\n\n";
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Free(cached_I64);
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Free(uncached_I64);
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MemBlks2MegFree(bp,shared_blks);
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Mem2MegFree(bp,shared_blks);
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Preempt(old_preempt);
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}
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