TempleOSCD_150216.ISO

This commit is contained in:
Terry A. Davis authored and minexew committed 2018-09-08 21:46:15 +02:00
1 parent 64f679eeb9
commit 401601816c
531 files changed
+23341 -22071

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+1 -1
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@@ -70,7 +70,7 @@ ANSWERS:
5) The R13 instruction takes one more byte because it is like $LK,"REG_RBP",A="MN:REG_RBP"$ in the ModR.
6) The RAX instruction has a REX byte prefix to specify 64-bit size. So does the R8 instruction, but in the REX is also a flag to specify upper-8 reg. For EAX, there is no need of REX.
6) The R8 instruction needs a REX byte prefix to specify upper-8 reg.
7) You can access the lowest byte of any reg. You can access AH but not the second-to-lowest byte of ESI.
+4 -4
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@@ -6,8 +6,8 @@ F64 VGAPattern(I64 p)
F64 start=tS;
I64 plane;
for (plane=1;plane<0x10;plane<<=1) {
OutU8(VGA_SC_INDEX,VGA_MAP_MASK);
OutU8(VGA_SC_DATA,plane);
OutU8(VGAP_INDEX,VGAR_MAP_MASK);
OutU8(VGAP_DATA,plane);
MemSetI64(0xA0000,p,640*480/64);
}
return tS-start;
@@ -23,10 +23,10 @@ U0 GrDemo()
for (i=0;i<16;i++) {
t=VGAPattern(0x5555555555555555);
"$$GREEN$$Rate:$$RED$$%5.1f FPS$$FG$$"
" $$GREEN$$Load@60Hz:$$RED$$%5.1f%%$$FG$$\n",1/t,100*t*60.0;
" $$GREEN$$Load@30Hz:$$RED$$%5.1f%%$$FG$$\n",1/t,100*t*30.0;
t=VGAPattern(0x3333333333333333);
"$$GREEN$$Rate:$$RED$$%5.1f FPS$$FG$$"
" $$GREEN$$Load@60Hz:$$RED$$%5.1f%%$$FG$$\n",1/t,100*t*60.0;
" $$GREEN$$Load@30Hz:$$RED$$%5.1f%%$$FG$$\n",1/t,100*t*30.0;
}
Preempt(old_preempt);
//<CTRL-ALT-f> will flush screen VGA cache.
+6 -6
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@@ -1,12 +1,12 @@
/*$WW,1$
$TR,"Main Compiler"$
$TR-C,"Main Compiler"$
$ID,2$The mini compiler is like the main compiler, except the main compiler's lexical analyser removes comments and does preprocessing. $LK,"Lex",A="MN:Lex"$(),$LK,"Echo",A="MN:Echo"$(ON).
The main compiler generates $LK,"Intermediate Code",A="FF:::/Compiler/CmpDefs.HPP,IC_END"$ at the parser stage. See $LK,"PrsExpression",A="MN:PrsExpression"$(), $LK,"PrsStatement",A="MN:PrsStatement"$().
The main compiler generates $LK,"Intermediate Code",A="FF:::/Compiler/CompilerA.HPP,IC_END"$ at the parser stage. See $LK,"PrsExpression",A="MN:PrsExpression"$(), $LK,"PrsStatement",A="MN:PrsStatement"$().
The main compiler optimizes See $LK,"Intermediate Code Attributes",A="FF:D:/Compiler/CmpInit.CPP,ST_INTERMEDIATE_CODE"$, $LK,"Combining Consts",A="FF:::/Compiler/OptPass012.CPP,case IC_MUL"$, $LK,"Choosing Reg Vars",A="FF:::/Compiler/OptPass3.CPP,cmp.num_reg_vars"$. Set $LK,"OTrace",A="MN:OTrace"$(ON) to see the optimization stages.
The main compiler optimizes See $LK,"Intermediate Code Attributes",A="MN:intermediate_code_table"$, $LK,"Combining Consts",A="FF:::/Compiler/OptPass012.CPP,case IC_MUL"$, $LK,"Choosing Reg Vars",A="FF:::/Compiler/OptPass3.CPP,cmp.num_reg_vars"$. Set $LK,"OTrace",A="MN:OTrace"$(ON) to see the optimization stages.
The main compiler makes machine code in the back end. See $LK,"IC Struct",A="MN:CIntermediateCode"$, $LK,"LCCCompile",A="MN:LCCCompile"$ and $LK,"OptPass789",A="FF:::/Compiler/OptPass789.CPP,IC_MUL"$(), $LK,"BackEnd",A="FF:::/Compiler/Back1a.CPP,ICMul"$. Set $LK,"CTrace",A="MN:CTrace"$(ON) to see the output of the backend.
The main compiler makes machine code in the back end. See $LK,"IC Struct",A="MN:CIntermediateCode"$, $LK,"LCCCompile",A="MN:LCCCompile"$ and $LK,"OptPass789A",A="FF:::/Compiler/OptPass789A.CPP,IC_MUL"$(), $LK,"BackEnd",A="FF:::/Compiler/BackA.CPP,ICMul"$. Set $LK,"CTrace",A="MN:CTrace"$(ON) to see the output of the backend.
$ID,-2$
$TR,"Mini Compiler"$
$ID,2$For this mini compiler, some things you should know about 64-bit asm:
@@ -216,8 +216,8 @@ U0 Main()
throw;
"$$RED$$This code is not efficient, but the compiler is simple.$$FG$$\n";
Un(code,dst-code); //Unassemble the code we created.
//$LK,"Call",A="MN:Call"$() is a function. See $LK,"_CALL",A="FF:::/Kernel/Utils1a.CPP,_CALL"$::
//See also $LK,"CallInd",A="MN:CallInd"$(). See $LK,"_CALLIND",A="FF:::/Kernel/Utils1a.CPP,_CALLIND"$::
//$LK,"Call",A="MN:Call"$() is a function. See $LK,"_CALL",A="FF:::/Kernel/KUtils.CPP,_CALL"$::
//See also $LK,"CallInd",A="MN:CallInd"$(). See $LK,"_CALLIND",A="FF:::/Kernel/KUtils.CPP,_CALLIND"$::
"$$LTBLUE$$Answer:%d$$FG$$\n",Call(code);
} catch {
"$$RED$$Error$$FG$$\n";
+2 -2
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@@ -19,8 +19,8 @@ U0 MGUpdate()
{//Copy image to VGA memory
//For better performance we could only write what's changed.
//0xA0000 is slower than normal RAM.
OutU8(VGA_SC_INDEX,VGA_MAP_MASK);
OutU8(VGA_SC_DATA,0xF);//All color planes at once -- Black and White
OutU8(VGAP_INDEX,VGAR_MAP_MASK);
OutU8(VGAP_DATA,0xF);//All color planes at once -- Black and White
MemCpy(0xA0000,image,sizeof(image));
}
+7 -7
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@@ -5,12 +5,12 @@ TempleOS keeps a cached copy of VGA memory in
$LK,"gr.screen_image",A="MN:CGrGlbls"$. See $LK,"GrUpdateVGAGraphics",A="MN:GrUpdateVGAGraphics"$.
TempleOS used 4096 size pages for memory below addr 2 Meg
and 2 Meg pages above two Meg. See $LK,"MemPageSize",A="MN:MemPageSize"$() and $LK,"INIT_MEMORY",A="FF:::/Kernel/Mem1a.CPP,SYS_INIT_MEM"$.
and 2 Meg pages above two Meg. See $LK,"MemPageSize",A="MN:MemPageSize"$() and $LK,"INIT_MEMORY",A="FF:::/Kernel/MemA.CPP,SYS_INIT_MEM"$.
*/
U0 PageTableDemo1()
{
I64 *pte=MemPageTable(VGA_GRAPHIC_MEM_BASE),p0,p1;
I64 *pte=MemPageTable(VGAM_GRAPHICS),p0,p1;
"Page table entries for VGA screen memory\n";
DocD(pte);
PressAKey;
@@ -19,8 +19,8 @@ U0 PageTableDemo1()
p1=pte[1];
pte[0]=p1;
pte[1]=p0;
InvlPg(VGA_GRAPHIC_MEM_BASE); //Invalidate translation look aside buffer (TLB).
InvlPg(VGA_GRAPHIC_MEM_BASE+0x1000);
InvlPg(VGAM_GRAPHICS); //Invalidate translation look aside buffer (TLB).
InvlPg(VGAM_GRAPHICS+0x1000);
//Use this if you wish to change
//the page table reg.
@@ -34,8 +34,8 @@ U0 PageTableDemo1()
pte[0]=p0;
pte[1]=p1;
InvlPg(VGA_GRAPHIC_MEM_BASE);
InvlPg(VGA_GRAPHIC_MEM_BASE+0x1000);
InvlPg(VGAM_GRAPHICS);
InvlPg(VGAM_GRAPHICS+0x1000);
//<CTRL-ALT-f> will flush screen VGA cache.
VGAFlush;
@@ -43,6 +43,6 @@ U0 PageTableDemo1()
PageTableDemo1;
//See $LK,"MemBlks2MegAlloc",A="MN:MemBlks2MegAlloc"$(), $LK,"MemBlks2MegFree",A="MN:MemBlks2MegFree"$() for page aligned allocations.
//See $LK,"Mem2MegAlloc",A="MN:Mem2MegAlloc"$(), $LK,"Mem2MegFree",A="MN:Mem2MegFree"$() for page aligned allocations.
//See $LK,"CBlkPool",A="MN:CBlkPool"$, $LK,"CHeapCtrl",A="MN:CHeapCtrl"$, $LK,"sys_code_bp",A="MN:sys_code_bp"$ and $LK,"sys_data_bp",A="MN:sys_data_bp"$.
//See $LK,"Memory Overview",A="FI:::/Doc/MemOverview.TXT"$ and $LK,"Memory Routines",A="HI:Memory"$.
+1 -1
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@@ -1,4 +1,4 @@
I64 *addr=VGA_GRAPHIC_MEM_BASE,
I64 *addr=VGAM_GRAPHICS,
*pte_addr=MemPageTable(addr),
err_code=0,
*reported_fault_addr;
+10 -10
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@@ -4,7 +4,7 @@
U0 PlotXY(I64 x,I64 y)
{
//Screen bits are reversed
LBts(VGA_GRAPHIC_MEM_BASE,y*GR_WIDTH+x^7);
LBts(VGAM_GRAPHICS,y*GR_WIDTH+x^7);
}
U0 Main()
@@ -13,22 +13,22 @@ U0 Main()
Bool old_preempt=Preempt(OFF);
//This makes all 4 color planes active.
OutU8(VGA_SC_INDEX,VGA_MAP_MASK);
OutU8(VGA_SC_DATA,WHITE);
MemSet(VGA_GRAPHIC_MEM_BASE,0,GR_WIDTH*GR_HEIGHT/8);
OutU8(VGAP_INDEX,VGAR_MAP_MASK);
OutU8(VGAP_DATA,WHITE);
MemSet(VGAM_GRAPHICS,0,GR_WIDTH*GR_HEIGHT/8);
OutU8(VGA_SC_INDEX,VGA_MAP_MASK);
OutU8(VGA_SC_DATA,RED);
OutU8(VGAP_INDEX,VGAR_MAP_MASK);
OutU8(VGAP_DATA,RED);
for (i=0;i<200;i++)
PlotXY(i,i);
OutU8(VGA_SC_INDEX,VGA_MAP_MASK);
OutU8(VGA_SC_DATA,GREEN);
OutU8(VGAP_INDEX,VGAR_MAP_MASK);
OutU8(VGAP_DATA,GREEN);
for (i=0;i<200;i++)
PlotXY(100,i);
OutU8(VGA_SC_INDEX,VGA_MAP_MASK);
OutU8(VGA_SC_DATA,BLUE);
OutU8(VGAP_INDEX,VGAR_MAP_MASK);
OutU8(VGAP_DATA,BLUE);
for (i=0;i<200;i++)
PlotXY(200-i,i);
/*If you want a mixed color select multiple planes
+2 -2
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@@ -14,7 +14,7 @@ U0 TimeIns()
CPURep;
shared_blks=1;
bp=MemBlksUncachedAlloc(&shared_blks);
bp=Mem2MegUncachedAlloc(&shared_blks);
hc=HeapCtrlBPInit(bp,shared_blks<<12);
uncached_I64=MAlloc(sizeof(I64),hc);
@@ -39,7 +39,7 @@ U0 TimeIns()
"because the loop overhead was not subtracted.$$FG$$\n\n";
Free(cached_I64);
Free(uncached_I64);
MemBlks2MegFree(bp,shared_blks);
Mem2MegFree(bp,shared_blks);
Preempt(old_preempt);
}