TempleOSCD_140715.ISO
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@@ -55,20 +55,20 @@ U0 OptPass3(CLex *lx,COptReg *reg_offsets)
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else {
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if (tempil1=OptLag(tempi)) {
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if (!(tempil2=OptLag(tempil1)))
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tempil2=&opt_nop;
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tempil2=&cmp.ic_nop;
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} else
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tempil1=tempil2=&opt_nop;
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tempil1=tempil2=&cmp.ic_nop;
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tempc=tempi->ic_class;
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nobound_switch (cmp_arg_cnt[code]) {
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nobound_switch (cmp.arg_cnt[code]) {
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case 9:
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ps->ptr-=tempi->ic_data>>3;
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break;
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case 2:
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tempi2=PrsPop(ps);
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if (tempi2->ic_flags&ICF_R_TO_F64)
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tempc2=sys_internal_types[RT_F64];
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tempc2=cmp.internal_types[RT_F64];
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else if (tempi2->ic_flags & ICF_R_TO_INT)
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tempc2=sys_internal_types[RT_I64];
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tempc2=cmp.internal_types[RT_I64];
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else
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tempc2=tempi->t.a2c;
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tempi->a2.type=TY_STK+CmpRawType(tempc2);
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@@ -77,9 +77,9 @@ U0 OptPass3(CLex *lx,COptReg *reg_offsets)
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case 1:
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tempi1=PrsPop(ps);
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if (tempi1->ic_flags&ICF_R_TO_F64)
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tempc1=sys_internal_types[RT_F64];
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tempc1=cmp.internal_types[RT_F64];
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else if (tempi1->ic_flags & ICF_R_TO_INT)
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tempc1=sys_internal_types[RT_I64];
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tempc1=cmp.internal_types[RT_I64];
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else
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tempc1=tempi->t.a1c;
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tempi->a1.type=TY_STK+CmpRawType(tempc1);
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@@ -89,7 +89,7 @@ U0 OptPass3(CLex *lx,COptReg *reg_offsets)
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case 0: //nobound_switch
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break;
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}
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if (cmp_result_cnt[code]) {
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if (cmp.result_cnt[code]) {
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tempi->r.type=TY_STK+CmpRawType(tempc);
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tempi->r.type_pointed=CmpRawTypePointed(tempc);
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tempi->ic_flags|=ICF_R_WAS_STK;
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@@ -458,7 +458,7 @@ here1:
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case IC_SWAP_U8:
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case IC_SWAP_U16:
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case IC_SWAP_U32:
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case IC_SWAP_U64:
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case IC_SWAP_I64:
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case IC_QUE_INIT:
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case IC_QUE_INS:
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case IC_QUE_INS_REV:
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@@ -515,6 +515,25 @@ here1:
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}
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tempi=tempi_next;
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}
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/* REGISTER VARIABLE ASSIGNMENT
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We just scored num occurrences of each [RBP] offset in the code to help decide
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which variables should be assigned to register variables.
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We counted the times each offset was added to RBP as a plus LEA and we subtract the
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times the offset is dereferenced. If the address was calculated more times
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than the offset was dereferenced, the variable's address was passed or assigned
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and we cannot use a register because you can't take address of a reg var.
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RAX,RBX,RCX,RDX are free to be clobbered by each intermediate code. RAX links
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intermediate codes together. R8 and R9 are used for stack machine temporaries.
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RBP is used as stack frame.
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RSI,RDI,R10,R11,R12,R13,R14,R15 are used for reg vars. R12 and R13, however,
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have a unusual ModR addressing mode in the x86_64 architecture, so I only use
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R12 and R13 as non-pointer register variables, such as index variables i,j,k.
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*/
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if (lx->htc.fun) {
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lx->htc.fun->used_reg_mask=lx->htc.fun->used_reg_mask&~(REG_VARS_MASK|REG_NON_PTR_MASK)|used_reg_mask;
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if (!Bt(&lx->opts,OPTf_NO_REG_VAR) &&
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@@ -537,21 +556,21 @@ here1:
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if (j>0) {
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if (Bt(&lx->flags,Lf_OPT_TRACE_PRESENT))
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"Fun:%s\n",lx->htc.fun->str;
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if (j>num_reg_vars) {
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if (j>cmp.num_reg_vars) {
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l=0;
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for (i=0;i<j && l<num_non_ptr_vars;i++) {
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for (i=0;i<j && l<cmp.num_non_ptr_vars;i++) {
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tempm=mv[i].m;
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tempc=OptClassFwd(tempm->member_class);
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if (!tempc->ptr_cnt && !tempm->dim.next) {
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while (l<num_non_ptr_vars &&
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Bts(&lx->htc.fun->used_reg_mask,to_non_ptr_vars_map[l]))
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while (l<cmp.num_non_ptr_vars &&
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Bts(&lx->htc.fun->used_reg_mask,cmp.non_ptr_vars_map[l]))
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l++;
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if (l<num_non_ptr_vars) {
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tempm->reg=to_non_ptr_vars_map[l++];
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if (l<cmp.num_non_ptr_vars) {
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tempm->reg=cmp.non_ptr_vars_map[l++];
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reg_offsets[tempm->reg].offset=mv[i].offset_start;
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reg_offsets[tempm->reg].m=tempm;
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if (Bt(&lx->flags,Lf_OPT_TRACE_PRESENT))
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"Reg %Z Var \"%s\" %08X[RBP]\n",tempm->reg,"ST_U64_REGS",
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"Reg %Z Var \"%-15ts\" %016X[RBP]\n",tempm->reg,"ST_U64_REGS",
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tempm->str,reg_offsets[tempm->reg].offset;
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mv[i].offset_start=0; //flag as reg var
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if (tempm->size<8 && !StrIMatch("Bool",tempm->member_class->str) &&
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@@ -565,20 +584,20 @@ here1:
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}
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}
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l=0;
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for (i=0;i<j && l<num_reg_vars;i++) {
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for (i=0;i<j && l<cmp.num_reg_vars;i++) {
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tempm=mv[i].m;
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//if not just flagged as reg var
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if (mv[i].offset_start && (!mv[i].m->dim.next||
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tempm->offset>0 && StrCmp(tempm->str,"argv"))) {
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while (l<num_reg_vars &&
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Bts(&lx->htc.fun->used_reg_mask,to_reg_vars_map[l]))
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while (l<cmp.num_reg_vars &&
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Bts(&lx->htc.fun->used_reg_mask,cmp.to_reg_vars_map[l]))
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l++;
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if (l<num_reg_vars) {
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tempm->reg=to_reg_vars_map[l++];
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if (l<cmp.num_reg_vars) {
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tempm->reg=cmp.to_reg_vars_map[l++];
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reg_offsets[tempm->reg].offset=mv[i].offset_start;
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reg_offsets[tempm->reg].m=tempm;
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if (Bt(&lx->flags,Lf_OPT_TRACE_PRESENT))
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"Reg %Z Var \"%s\" %08X[RBP]\n",tempm->reg,"ST_U64_REGS",
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"Reg %Z Var \"%-15ts\" %016X[RBP]\n",tempm->reg,"ST_U64_REGS",
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tempm->str,reg_offsets[tempm->reg].offset;
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if (tempm->size<8 && !StrIMatch("Bool",tempm->member_class->str) &&
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tempm->member_class->type&HTT_INTERNAL_TYPE)
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