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TempleOSCDV4.05.ISO

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This commit is contained in:
Terry A. Davis authored and minexew committed 2018-09-08 21:47:13 +02:00
1 parent d1856315e0
commit 6fe38d2d9d
118 files changed
+4559 -5069
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Compiler/BackLib.CPP
+111 -113
View File
@@ -72,8 +72,7 @@ U0 ICAddRSP(CIntermediateCode *tempi,I64 i,Bool optimize=TRUE)
CIntermediateCode *tempil1;
if (optimize && (tempil1=ICLastIns(tempi))) {
j=tempil1->ic_cnt;
if (tempil1->ic_last_cnt==j-4 &&
tempil1->ic_body[j-3]==0x83 &&
if (tempil1->ic_last_cnt==j-4 && tempil1->ic_body[j-3]==0x83 &&
tempil1->ic_body[j-4]==0x48) {
if (tempil1->ic_body[j-2]==0xEC)
j=-tempil1->ic_body[j-1](I8);
@@ -81,8 +80,7 @@ U0 ICAddRSP(CIntermediateCode *tempi,I64 i,Bool optimize=TRUE)
j=tempil1->ic_body[j-1](I8);
else
j=0;
} else if (tempil1->ic_last_cnt==j-7 &&
tempil1->ic_body[j-6]==0x81 &&
} else if (tempil1->ic_last_cnt==j-7 && tempil1->ic_body[j-6]==0x81 &&
tempil1->ic_body[j-7]==0x48) {
if (tempil1->ic_body[j-5]==0xEC)
j=-tempil1->ic_body[j-4](I32);
@@ -127,28 +125,24 @@ U0 ICAddRSP(CIntermediateCode *tempi,I64 i,Bool optimize=TRUE)
}
extern U0 ICMov(CIntermediateCode *tempi,
I64 t1,I64 r1,I64 d1,I64 t2,I64 r2,I64 d2,I64 ip);
CICType t1,I64 r1,I64 d1,CICType t2,I64 r2,I64 d2,I64 ip);
#define MDR_REG 0
#define MDR_INDIRECT_REG 1
#define MDR_D8_INDIRECT_REG 2
#define MDR_D32_INDIRECT_REG 3
#define MDR_SIB_INDIRECT_REG 4
#define MDR_SIB_D8_INDIRECT_REG 5
#define MDR_SIB_D32_INDIRECT_REG 6
#define MDR_RIP_REL 7
#define MODR_REG 0
#define MODR_INDIRECT_REG 1
#define MODR_D8_INDIRECT_REG 2
#define MODR_D32_INDIRECT_REG 3
#define MODR_SIB_INDIRECT_REG 4
#define MODR_SIB_D8_INDIRECT_REG 5
#define MODR_SIB_D32_INDIRECT_REG 6
#define MODR_RIP_REL 7
I64 ICModr1(I64 r,I64 t2,I64 r2,I64 d2)
I64 ICModr1(I64 r,CICType t2,I64 r2,I64 d2)
{//result.u8[0] is type
//result.u8[1] is REX
//result.u8[2] is ModR
//result.u8[3] is SIB
I64 result=0;
if (t2&TY_MASK>TY_RIP_DISP32) {
"Callers:%P;%P\n",Caller,Caller(2);
throw('Compiler');
}
if (t2&RT_MASK<RT_I64)
if (t2.raw_type<RT_I64)
result.u8[1]=0x40;
else
result.u8[1]=0x48;
@@ -156,36 +150,36 @@ I64 ICModr1(I64 r,I64 t2,I64 r2,I64 d2)
result.u8[1]+=4;
r&=7;
}
switch (t2>>4) {
case TY_REG>>4:
switch (Bsr(t2)) {
case MDf_REG:
if (r2>7) {
result.u8[1]++;
r2&=7;
}
result.u8[2]=0xC0+r<<3+r2;
result.u8[0]=MDR_REG;
if (result.u8[1]==0x40 && (t2&RT_MASK>=RT_I16 || r<4 && r2<4))
result.u8[0]=MODR_REG;
if (result.u8[1]==0x40 && (t2.raw_type>=RT_I16 || r<4 && r2<4))
result.u8[1]=0;
break;
case TY_DISP>>4:
case MDf_DISP:
if (r2>7) {
result.u8[1]++;
r2&=7;
}
if (!d2 && r2!=REG_RBP) {
result.u8[2]=r<<3+r2;
result.u8[0]=MDR_INDIRECT_REG;
result.u8[0]=MODR_INDIRECT_REG;
} else if (MIN_I8<=d2<=MAX_I8) {
result.u8[2]=0x40+r<<3+r2;
result.u8[0]=MDR_D8_INDIRECT_REG;
result.u8[0]=MODR_D8_INDIRECT_REG;
} else {
result.u8[2]=0x80+r<<3+r2;
result.u8[0]=MDR_D32_INDIRECT_REG;
result.u8[0]=MODR_D32_INDIRECT_REG;
}
if (result.u8[1]==0x40 && (t2&RT_MASK>=RT_I16 || r<4))
if (result.u8[1]==0x40 && (t2.raw_type>=RT_I16 || r<4))
result.u8[1]=0;
break;
case TY_SIB>>4:
case MDf_SIB:
if (7<r2.u8[0]<REG_NONE)
result.u8[1]++;
if (r2.u8[1]&15>7)
@@ -193,27 +187,27 @@ I64 ICModr1(I64 r,I64 t2,I64 r2,I64 d2)
if (r2.u8[0]==REG_NONE) {
result.u8[3]=5+(r2.u8[1]&7)<<3+r2.u8[1]&0xC0;
result.u8[2]=4+r<<3;
result.u8[0]=MDR_SIB_D32_INDIRECT_REG;
result.u8[0]=MODR_SIB_D32_INDIRECT_REG;
} else {
result.u8[3]=r2.u8[0]&7+(r2.u8[1]&7)<<3+r2.u8[1]&0xC0;
if (!d2 && r2.u8[0]&7!=REG_RBP) {
result.u8[2]=4+r<<3;
result.u8[0]=MDR_SIB_INDIRECT_REG;
result.u8[0]=MODR_SIB_INDIRECT_REG;
} else if (MIN_I8<=d2<=MAX_I8) {
result.u8[2]=0x44+r<<3;
result.u8[0]=MDR_SIB_D8_INDIRECT_REG;
result.u8[0]=MODR_SIB_D8_INDIRECT_REG;
} else {
result.u8[2]=0x84+r<<3;
result.u8[0]=MDR_SIB_D32_INDIRECT_REG;
result.u8[0]=MODR_SIB_D32_INDIRECT_REG;
}
}
if (result.u8[1]==0x40 && (t2&RT_MASK>=RT_I16 || r<4))
if (result.u8[1]==0x40 && (t2.raw_type>=RT_I16 || r<4))
result.u8[1]=0;
break;
case TY_RIP_DISP32>>4:
case MDf_RIP_DISP32:
result.u8[2]=0x05+r<<3;
result.u8[0]=MDR_RIP_REL;
if (result.u8[1]==0x40 && (t2&RT_MASK>=RT_I16 || r<4))
result.u8[0]=MODR_RIP_REL;
if (result.u8[1]==0x40 && (t2.raw_type>=RT_I16 || r<4))
result.u8[1]=0;
break;
}
@@ -223,28 +217,28 @@ I64 ICModr1(I64 r,I64 t2,I64 r2,I64 d2)
U0 ICModr2(CIntermediateCode *tempi,I64 i,I64 d,I64 ip=0)
{//t=0 means no SIB
switch [i.u8[0]] {
case MDR_REG:
case MODR_REG:
break;
case MDR_INDIRECT_REG:
case MODR_INDIRECT_REG:
break;
case MDR_D8_INDIRECT_REG:
case MODR_D8_INDIRECT_REG:
ICU8(tempi,d);
break;
case MDR_D32_INDIRECT_REG:
case MODR_D32_INDIRECT_REG:
ICU32(tempi,d);
break;
case MDR_SIB_INDIRECT_REG:
case MODR_SIB_INDIRECT_REG:
ICU8(tempi,i.u8[3]);
break;
case MDR_SIB_D8_INDIRECT_REG:
case MODR_SIB_D8_INDIRECT_REG:
ICU8(tempi,i.u8[3]);
ICU8(tempi,d);
break;
case MDR_SIB_D32_INDIRECT_REG:
case MODR_SIB_D32_INDIRECT_REG:
ICU8(tempi,i.u8[3]);
ICU32(tempi,d);
break;
case MDR_RIP_REL:
case MODR_RIP_REL:
ICU32(tempi,d-(ip+tempi->ic_cnt));
tempi->ic_flags&=~ICF_CODE_FINAL;
break;
@@ -272,16 +266,16 @@ U0 ICModr2(CIntermediateCode *tempi,I64 i,I64 d,I64 ip=0)
#define SLASH_OP_FISTTP 0x0000000001DDDD01
#define SLASH_OP_FILD 0x0000000001DFDF05
U0 ICSlashOp(CIntermediateCode *tempi,I64 t1,I64 r1,I64 d1,I64 op,I64 ip)
U0 ICSlashOp(CIntermediateCode *tempi,CICType t1,I64 r1,I64 d1,I64 op,I64 ip)
{
I64 i;
if (t1&TY_MASK==TY_REG && !op.u8[3])
t1=t1&(TY_MASK|1)+RT_I64; //Set to 64 bit, preserving signed/unsigned
if (t1&MDF_REG && !op.u8[3])
t1=t1&(MDG_MASK|RTF_UNSIGNED)+RT_I64; //Set to 64 bit,preserving unsigned
i=ICModr1(op.u8[0],t1,r1,d1);
if (tempi->ic_flags&ICF_LOCK && op!=SLASH_OP_MOV && t1&TY_MASK!=TY_REG)
if (tempi->ic_flags&ICF_LOCK && op!=SLASH_OP_MOV && !(t1&MDF_REG))
ICU8(tempi,OC_LOCK_PREFIX);
switch (t1&RT_MASK) {
switch (t1.raw_type) {
case RT_I8:
case RT_U8:
ICRex(tempi,i.u8[1]);
@@ -300,32 +294,32 @@ U0 ICSlashOp(CIntermediateCode *tempi,I64 t1,I64 r1,I64 d1,I64 op,I64 ip)
ICModr2(tempi,i,d1,ip+4);
}
U0 ICPush(CIntermediateCode *tempi,I64 t1,I64 r1,I64 d1,I64 ip)
U0 ICPush(CIntermediateCode *tempi,CICType t1,I64 r1,I64 d1,I64 ip)
{
switch (t1>>4) {
case TY_REG>>4:
switch (Bsr(t1)) {
case MDf_REG:
if (r1>7)
ICU16(tempi,0x5049+(r1&7)<<8);
else
ICU8(tempi,0x50+r1);
return;
case TY_IMM>>4:
case MDf_IMM:
if (MIN_I8<=d1<=MAX_I8)
ICU16(tempi,0x6A+d1<<8);
else if (MIN_I32<=d1<=MAX_I32) {
ICU8(tempi,0x68);
ICU32(tempi,d1);
} else {
ICMov(tempi,TY_REG+RT_I64,REG_RBX,0,t1,r1,d1,ip);
ICMov(tempi,MDF_REG+RT_I64,REG_RBX,0,t1,r1,d1,ip);
ICU8(tempi,0x50+REG_RBX);
}
return;
case TY_STK>>4:
case MDf_STK:
return;
case TY_DISP>>4:
case TY_SIB>>4:
case TY_RIP_DISP32>>4:
switch (t1&RT_MASK) {
case MDf_DISP:
case MDf_SIB:
case MDf_RIP_DISP32:
switch (t1.raw_type) {
case RT_I64:
case RT_U64:
case RT_F64:
@@ -334,7 +328,7 @@ U0 ICPush(CIntermediateCode *tempi,I64 t1,I64 r1,I64 d1,I64 ip)
}
break;
}
ICMov(tempi,TY_REG+RT_I64,REG_RBX,0,t1,r1,d1,ip);
ICMov(tempi,MDF_REG+RT_I64,REG_RBX,0,t1,r1,d1,ip);
ICU16(tempi,0x5048+REG_RBX<<8);
}
@@ -351,30 +345,31 @@ U0 ICPushRegs(CIntermediateCode *tempi,I64 mask)
}
}
U0 ICPop(CIntermediateCode *tempi,I64 t1,I64 r1,I64 d1,I64 ip)
U0 ICPop(CIntermediateCode *tempi,CICType t1,I64 r1,I64 d1,I64 ip)
{
switch (t1>>4) {
case TY_NULL>>4:
ICAddRSP(tempi,8);
break;
case TY_REG>>4:
switch (Bsr(t1)) {
case MDf_REG:
if (r1>7)
ICU16(tempi,0x5849+(r1&7)<<8);
else
ICU8(tempi,0x58+r1);
break;
case TY_DISP>>4:
case TY_RIP_DISP32>>4:
case TY_SIB>>4:
if (t1&RT_MASK<RT_I64) {
case MDf_DISP:
case MDf_RIP_DISP32:
case MDf_SIB:
if (t1.raw_type<RT_I64) {
ICU8(tempi,0x58+REG_RBX);
ICMov(tempi,t1,r1,d1,TY_REG+RT_I64,REG_RBX,0,ip);
ICMov(tempi,t1,r1,d1,MDF_REG+RT_I64,REG_RBX,0,ip);
} else
ICSlashOp(tempi,t1,r1,d1,SLASH_OP_POP,ip);
break;
default:
case MDf_STK:
case MDf_IMM:
ICU8(tempi,0x58+REG_RBX);
ICMov(tempi,t1,r1,d1,TY_REG+RT_I64,REG_RBX,0,ip);
ICMov(tempi,t1,r1,d1,MDF_REG+RT_I64,REG_RBX,0,ip);
break;
default:
ICAddRSP(tempi,8);
}
}
@@ -433,14 +428,14 @@ I64 ICBuiltInFloatConst(F64 d)
}
U0 ICMov(CIntermediateCode *tempi,
I64 t1,I64 r1,I64 d1,I64 t2,I64 r2,I64 d2,I64 ip)
CICType t1,I64 r1,I64 d1,CICType t2,I64 r2,I64 d2,I64 ip)
{
I64 i,j,last_cnt=tempi->ic_cnt;
CIntermediateCode *tempil1;
Bool old_lock=Btr(&tempi->ic_flags,ICf_LOCK);
switch (t1>>4) {
case TY_REG>>4:
if (t2&TY_MASK==TY_IMM) {
switch (Bsr(t1)) {
case MDf_REG:
if (t2&MDF_IMM) {
if (!d2)
ICZero(tempi,r1);
else if (0<=d2<=MAX_U8) {
@@ -492,13 +487,13 @@ U0 ICMov(CIntermediateCode *tempi,
ICU16(tempi,i+r1<<8);
ICU64(tempi,d2);
}
} else if (t2&TY_MASK==TY_STK)
} else if (t2&MDF_STK)
ICPop(tempi,t1,r1,d1,ip);
else {
if (r1==r2 && t2&TY_MASK==TY_REG)
if (r1==r2 && t2&MDF_REG)
goto move_done;
if (t2&TY_MASK==TY_REG) {
t2=TY_REG+RT_I64;
if (t2&MDF_REG) {
t2=MDF_REG+RT_I64;
if (tempil1=ICLastIns(tempi)) {
i=tempil1->ic_cnt;
j=0x48+(r1>7);
@@ -511,10 +506,10 @@ U0 ICMov(CIntermediateCode *tempi,
}
}
i=ICModr1(r1,t2,r2,d2);
if (t2&RT_MASK!=RT_U32)
if (t2.raw_type!=RT_U32)
i|=0x4800;
ICRex(tempi,i.u8[1]);
switch (t2&RT_MASK) {
switch (t2.raw_type) {
case RT_I8:
ICU24(tempi,i.u8[2]<<16+0xBE0F);
break;
@@ -537,19 +532,22 @@ U0 ICMov(CIntermediateCode *tempi,
ICModr2(tempi,i,d2,ip+4);
}
break;
case TY_STK>>4:
if (t1&RT_MASK<t2&RT_MASK)
ICPush(tempi,t2&TY_MASK+t1&RT_MASK,r2,d2,ip);
case MDf_STK:
if (tempi->ic_flags&ICF_PUSH_CMP)
ICPopRegs(tempi,1<<REG_RBX);
if (t1.raw_type<t2.raw_type)
ICPush(tempi,t2&MDG_MASK+t1.raw_type,r2,d2,ip);
else
ICPush(tempi,t2,r2,d2,ip);
if (tempi->ic_flags&ICF_PUSH_CMP)
ICPushRegs(tempi,1<<REG_RBX);
break;
case TY_DISP>>4:
case TY_RIP_DISP32>>4:
case TY_SIB>>4:
if (t2&TY_MASK==TY_IMM && (t1&RT_MASK<RT_I64 ||
(MIN_I32<=d2<=MAX_I32))) {
case MDf_DISP:
case MDf_RIP_DISP32:
case MDf_SIB:
if (t2&MDF_IMM && (t1.raw_type<RT_I64 || (MIN_I32<=d2<=MAX_I32))) {
i=ICModr1(0,t1,r1,d1);
switch (t1&RT_MASK) {
switch (t1.raw_type) {
case RT_I8:
case RT_U8:
ICRex(tempi,i.u8[1]);
@@ -564,11 +562,11 @@ U0 ICMov(CIntermediateCode *tempi,
ICRex(tempi,i.u8[1]);
ICU16(tempi,i.u8[2]<<8+0xC7);
}
if (i.u8[0]!=MDR_RIP_REL)
if (i.u8[0]!=MODR_RIP_REL)
ICModr2(tempi,i,d1,);
else {
i=d1-(ip+tempi->ic_cnt+4);
switch (t1&RT_MASK) {
switch (t1.raw_type) {
case RT_I8:
case RT_U8:
i--;
@@ -584,7 +582,7 @@ U0 ICMov(CIntermediateCode *tempi,
tempi->ic_flags&=~ICF_CODE_FINAL;
}
switch (t1&RT_MASK) {
switch (t1.raw_type) {
case RT_I8:
case RT_U8:
ICU8(tempi,d2);
@@ -597,11 +595,11 @@ U0 ICMov(CIntermediateCode *tempi,
ICU32(tempi,d2);
}
} else {
if (t2&TY_MASK==TY_REG)
if (t2&MDF_REG)
ICSlashOp(tempi,t1,r1,d1,r2+SLASH_OP_MOV,ip);
else {
ICMov(tempi,TY_REG+RT_I64,REG_RBX,0,t2,r2,d2,ip);
ICMov(tempi,t1,r1,d1,TY_REG+RT_I64,REG_RBX,0,ip);
ICMov(tempi,MDF_REG+RT_I64,REG_RBX,0,t2,r2,d2,ip);
ICMov(tempi,t1,r1,d1,MDF_REG+RT_I64,REG_RBX,0,ip);
}
}
break;
@@ -612,20 +610,20 @@ move_done:
tempi->ic_last_cnt=last_cnt;
}
U0 ICLea(CIntermediateCode *tempi,
I64 t1,I64 r1,I64 d1,I64 t2,I64 r2,I64 d2,CCmpCtrl *cc,U8 *buf,I64 ip)
U0 ICLea(CIntermediateCode *tempi,CICType t1,I64 r1,I64 d1,
CICType t2,I64 r2,I64 d2,CCmpCtrl *cc,U8 *buf,I64 ip)
{
I64 i;
CAOTAbsAddr *tempa;
switch (t1>>4) {
case TY_REG>>4:
switch (Bsr(t1)) {
case MDf_REG:
i=ICModr1(r1,t2,r2,d2);
i.u8[1]|=0x48;
ICU24(tempi,i.u8[2]<<16+0x8D00+i.u8[1]);
ICModr2(tempi,i,d2,ip+4);
break;
case TY_STK>>4:
if (t2&TY_MASK==TY_RIP_DISP32) {
case MDf_STK:
if (t2&MDF_RIP_DISP32) {
ICU8(tempi,0x68);
ICU32(tempi,d2);
if (cc->flags&CCF_AOT_COMPILE && buf && !(cc->flags&CCF_NO_ABSS)) {
@@ -639,24 +637,24 @@ U0 ICLea(CIntermediateCode *tempi,
break;
} // Fall thru
default:
ICLea(tempi,TY_REG+RT_I64,REG_RCX,0,t2,r2,d2,cc,buf,ip);
ICMov(tempi,t1,r1,d1,TY_REG+RT_I64,REG_RCX,0,ip);
ICLea(tempi,MDF_REG+RT_I64,REG_RCX,0,t2,r2,d2,cc,buf,ip);
ICMov(tempi,t1,r1,d1,MDF_REG+RT_I64,REG_RCX,0,ip);
}
}
U0 ICDeref(CIntermediateCode *tempi,I64 ip)
{
I64 t;
t=tempi->r.type&RT_MASK;
CICType t;
t=tempi->r.type.raw_type;
if (t>tempi->a1.type_pointed_to)
t=tempi->a1.type_pointed_to;
if (tempi->a1.type&TY_MASK==TY_REG)
if (tempi->a1.type&MDF_REG)
ICMov(tempi,tempi->r.type,tempi->r.reg,tempi->r.disp,
TY_DISP+t,tempi->a1.reg,tempi->a1.disp,ip);
MDF_DISP+t,tempi->a1.reg,tempi->a1.disp,ip);
else {
ICMov(tempi,TY_REG+RT_I64,REG_RCX,0,
ICMov(tempi,MDF_REG+RT_I64,REG_RCX,0,
tempi->a1.type,tempi->a1.reg,tempi->a1.disp,ip);
ICMov(tempi,tempi->r.type,tempi->r.reg,tempi->r.disp,
TY_DISP+t,REG_RCX,0,ip);
MDF_DISP+t,REG_RCX,0,ip);
}
}