TempleOSTS_140317.ISO
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@@ -0,0 +1,79 @@
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/*
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This is a JIT file, not AOT.
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Asm labels can only be defined once
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in a task. Hit F5 to spawn a new task
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each time and run it.
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*/
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asm {
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//Opcodes are slightly different to make writing my x86_64 assembler easier.
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//See $LK,"::/Compiler/OpCodes.TXT"$.
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USE64 //Defaults to 64, but this is a good habit.
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IMPORT Beep;
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_BEEPS::
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//You can always clobber RAX,RBX,RCX,RDX,R8,R9
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PUSH RBP
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MOV RBP,RSP
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MOV RCX,U64 SF_ARG1[RBP] //$LK,"SF_ARG1",A="FF:::/Kernel/Adam1a.HPP,SF_ARG1"$
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@@05: PUSH RCX
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//U0 Beep(I64 freq=500,Bool busy=FALSE)
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PUSH FALSE //Do not busy (spin) wait
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PUSH 500 //Hz
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CALL Beep
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POP RCX
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LOOP @@05
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POP RBP
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//Return vals are in RAX
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RET1 8
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}
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//_extern binds a asm sym to a function.
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//My convention is to put an underscore
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//on C callable routines.
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_extern _BEEPS U0 Beeps(I64 cnt);
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I64 AsmAndC1()
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{
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I64 noreg i; //Normally this would be stored in a reg
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//Check with $LK,"Uf",A="MN:Uf"$("AsmAndC1").
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i=PmtI64("Num of beeps 1-5 (%d):",3,1,5);
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Beeps(i);
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asm {
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//You can clobber RAX,RBX,RCX,RDX
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USE64 //Defaults to 64, but this is a good habit.
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IMPORT Snd; //Import an not use & or don't import and use &Snd.
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MOV RCX,&i[RBP] //You can clobber RAX,RBX,RCX,RDX.
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//You better preserve the rest.
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@@05: PUSH RCX
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//U0 Snd(F64 freq);
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MOV RAX,RCX //freq=loop*100.0+100.0
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IMUL2 RAX,100 //TempleOS uses nonstandard opcodes
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//to avoid multiple form of the same one.
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//See $LK,"::/Compiler/OpCodes.TXT"$.
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ADD RAX,100
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PUSH RAX
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FILD U64 [RSP] //Convert from int to floating
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FSTP U64 [RSP]
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CALL Snd
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MOV RCX,time_stamp_freq>>3 //JIT Const. Simple delay loop
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@@10: LOOP @@10
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POP RCX
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LOOP @@05
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}
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Snd(0);
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return i;
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}
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"Beeps:%d\n",AsmAndC1;
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@@ -0,0 +1,92 @@
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/*
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This is a JIT file, not AOT.
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Asm labels can only be defined once
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in a task. Hit F5 to spawn a new task
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each time and run it.
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*/
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//This is to demo glbl var access.
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//Glbs defined elsewhere can accessed too, like sys_jiffies.
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I64 glbl_hz=400,glbl_hz_step=100,glbl_hz_base=100;
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asm {
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//Opcodes are slightly different to make writing my x86_64 assembler easier.
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//See $LK,"::/Compiler/OpCodes.TXT"$.
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USE64 //Defaults to 64, but this is a good habit.
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JIFFIES_MSG: DU8 "Jiffies:",0;
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//See $LK,"::/Kernel/Str1a.CPP",A="FL:::/Kernel/Str1a.CPP,1"$ and $LK,"::/Kernel/Utils1a.CPP"$.
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_BEEPS2::
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//You can clobber RAX,RBX,RCX,RDX,R8,R9
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PUSH RBP
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MOV RBP,RSP
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MOV RCX,U64 SF_ARG1[RBP] //$LK,"SF_ARG1",A="FF:::/Kernel/Adam1a.HPP,SF_ARG1"$
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PUSH U64 [&sys_jiffies]
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@@05: PUSH RCX
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//U0 Beep(I64 freq=500,Bool busy=FALSE)
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PUSH FALSE //Do not busy (spin) wait
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PUSH U64 [&glbl_hz] //evaluated at run time
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CALL &Beep
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POP RCX
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LOOP @@05
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PUSH RSI //See $LK,"REG_VARS_MASK",A="MN:REG_VARS_MASK"$ & $LK,"REG_NON_PTR_MASK",A="MN:REG_NON_PTR_MASK"$
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MOV RSI,JIFFIES_MSG
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CALL PUT_STR
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POP RSI
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POP RAX
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SUB RAX,U64 [&sys_jiffies]
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NEG RAX
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CALL PUT_HEX_U64
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MOV RAX,'\n'
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CALL PUT_CHARS
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POP RBP
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RET1 8
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}
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//My convention is to put an underscore
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//on C callable routines.
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_extern _BEEPS2 U0 Beeps2(I64 cnt);
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U0 AsmAndC2()
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{
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I64 reg R15 i;
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i=PmtI64("$$PURPLE$$\n\nNum of beeps 1-5 (%d):$$FG$$",3,1,5);
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Beeps2(i);
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asm {
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LIST
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//You can clobber RAX,RBX,RCX,RDX, but preserve the rest.
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USE64 //Defaults to 64, but this is a good habit.
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MOV RCX,R15 //You can clobber RAX,RBX,RCX,RDX. Preserve the rest.
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@@05: PUSH RCX
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//U0 Snd(F64 freq);
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MOV RAX,RCX //freq=loop*100.0+100.0
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IMUL2 RAX,glbl_hz_step //evaluated at compile ttime
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ADD RAX,U64 [&glbl_hz_base] //evaluated at run time
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PUSH RAX
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FILD U64 [RSP] //Convert from int to floating
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FSTP U64 [RSP]
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CALL &Snd //We can skip IMPORT with & if JIT compiling.
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MOV RCX,time_stamp_freq>>3 //JIT Const. Simple delay loop.
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@@10: LOOP @@10
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POP RCX
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LOOP @@05
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}
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Snd(0);
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}
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AsmAndC2;
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@@ -0,0 +1,24 @@
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/*
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This is a JIT file, not AOT.
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Asm labels can only be defined once
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in a task. Hit F5 to spawn a new task
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each time and run it.
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*/
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U0 AsmAndC3()
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{
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I64 i;
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for (i=0;i<3;i++) {
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MOV AL,0x41
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STC
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ADC AL,0 //Round-about way to make the not special constant, 0x42.
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CALL PUT_HEX_U8
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MOV RCX,time_stamp_freq>>5 //JIT Cosnt. Simple delay loop.
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@@1: LOOP @@1
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MOV RAX,' What?\n'
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CALL PUT_CHARS
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}
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}
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AsmAndC3;
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@@ -0,0 +1,53 @@
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/*
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This is a JIT file, not AOT.
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Asm labels can only be defined once
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in a task. Hit F5 to spawn a new task
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each time and run it.
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These are many useful kernel
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routines $LK,"::/Kernel/Str1a.CPP",A="FF:::/Kernel/Str1a.CPP,PUT_CHARS"$
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intended to be called from
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asm. Generally, they preserve
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regs.
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You can call any routine you
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like, C or asm, if you import it.
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Be aware that C routines do not
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preserve RAX,RBX,RCX,RDX,R8,R9.
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When calling from the shell or
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from C, preserve all other regs.
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*/
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asm {
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//Opcodes are slightly different to make writing my x86_64 assembler easier.
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//See $LK,"::/Compiler/OpCodes.TXT"$.
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USE64 //Defaults to 64, but this is a good habit.
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MY_WORLD_MSG:
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//Define U8 does not put terminating zeros
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//on strings.
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DU8 "World\n",0;
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//My convention is to put an underscore
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//on C callable routines.
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_HELLO_WORLD::
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PUSH RSI //See $LK,"REG_VARS_MASK",A="MN:REG_VARS_MASK"$ & $LK,"REG_NON_PTR_MASK",A="MN:REG_NON_PTR_MASK"$
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MOV RCX,10
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@@05: MOV RAX,RCX
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CALL PUT_HEX_U8
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MOV RAX,CH_SPACE
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CALL PUT_CHARS
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MOV RAX,'Hello ' //Supports multi-byte char consts
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CALL PUT_CHARS
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//We broke it in two pieces to show different ways.
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MOV RSI,MY_WORLD_MSG
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CALL PUT_STR
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LOOP @@05
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POP RSI
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RET
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};
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Call(_HELLO_WORLD);
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@@ -0,0 +1,186 @@
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#define RANGE_START 1
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#define RANGE_END 100
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#define FIZZ_SPAN 6
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#define BUZZ_SPAN 7
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asm {
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_BUZZ_FIZZ::
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PUSH RBP
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MOV RBP,RSP //Always set-up stk frame. (Stack Gets Traced)
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PUSH RSI //See $LK,"REG_VARS_MASK",A="MN:REG_VARS_MASK"$ & $LK,"REG_NON_PTR_MASK",A="MN:REG_NON_PTR_MASK"$
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PUSH RDI
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MOV RSI,FIZZ_SPAN-RANGE_START%FIZZ_SPAN+1
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MOV RDI,BUZZ_SPAN-RANGE_START%BUZZ_SPAN+1
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MOV RAX,RANGE_START
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@@05: CALL PUT_HEX_U64
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PUSH RAX
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MOV RAX,CH_SPACE
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CALL PUT_CHARS
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DEC RSI
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JNZ @@10
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MOV RAX,'FIZZ '
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CALL PUT_CHARS
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MOV RSI,FIZZ_SPAN
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@@10: DEC RDI
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JNZ @@15
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MOV RAX,'BUZZ '
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CALL PUT_CHARS
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MOV RDI,BUZZ_SPAN
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@@15: MOV RAX,'\n'
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CALL PUT_CHARS
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POP RAX
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INC RAX
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CMP RAX,RANGE_END //Actually only a 32-bit instruction.
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JBE @@05
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POP RDI
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POP RSI
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POP RBP
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RET
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}
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Call(_BUZZ_FIZZ);
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/*
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_BUZZ_FIZZ+0x0000 55 PUSH U64 RBP
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_BUZZ_FIZZ+0x0001 488BEC MOV U64 RBP,U64 RSP
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_BUZZ_FIZZ+0x0004 56 PUSH U64 RSI
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_BUZZ_FIZZ+0x0005 57 PUSH U64 RDI
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_BUZZ_FIZZ+0x0006 BE06000000 MOV U64 RSI,U32 00000006
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_BUZZ_FIZZ+0x000B BF07000000 MOV U64 RDI,U32 00000007
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_BUZZ_FIZZ+0x0010 B801000000 MOV U64 RAX,U32 00000001
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_BUZZ_FIZZ+0x0015 E88F7D2480 CALL I32 PUT_HEX_U64+0x0000
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_BUZZ_FIZZ+0x001A 50 PUSH U64 RAX
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_BUZZ_FIZZ+0x001B B820000000 MOV U64 RAX,U32 00000020
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_BUZZ_FIZZ+0x0020 E8E87D2480 CALL I32 PUT_CHARS+0x0000
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_BUZZ_FIZZ+0x0025 48FFCE DEC U64 RSI
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_BUZZ_FIZZ+0x0028 7514 JNZ I8 _BUZZ_FIZZ+0x003E
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_BUZZ_FIZZ+0x002A 48B846495A5A MOV U64 RAX,U32 5A5A4946
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_BUZZ_FIZZ+0x0030 2000 AND U8 [RAX],U8 AL
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_BUZZ_FIZZ+0x0032 0000 ADD U8 [RAX],U8 AL
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_BUZZ_FIZZ+0x0034 E8D47D2480 CALL I32 PUT_CHARS+0x0000
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_BUZZ_FIZZ+0x0039 BE06000000 MOV U64 RSI,U32 00000006
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_BUZZ_FIZZ+0x003E 48FFCF DEC U64 RDI
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_BUZZ_FIZZ+0x0041 7514 JNZ I8 _BUZZ_FIZZ+0x0057
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_BUZZ_FIZZ+0x0043 48B842555A5A MOV U64 RAX,U32 5A5A5542
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_BUZZ_FIZZ+0x0049 2000 AND U8 [RAX],U8 AL
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_BUZZ_FIZZ+0x004B 0000 ADD U8 [RAX],U8 AL
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_BUZZ_FIZZ+0x004D E8BB7D2480 CALL I32 PUT_CHARS+0x0000
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_BUZZ_FIZZ+0x0052 BF07000000 MOV U64 RDI,U32 00000007
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_BUZZ_FIZZ+0x0057 B80A000000 MOV U64 RAX,U32 0000000A
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_BUZZ_FIZZ+0x005C E8AC7D2480 CALL I32 PUT_CHARS+0x0000
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_BUZZ_FIZZ+0x0061 58 POP U64 RAX
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_BUZZ_FIZZ+0x0062 48FFC0 INC U64 RAX
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_BUZZ_FIZZ+0x0065 4883F864 CMP U64 RAX,I8 64
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_BUZZ_FIZZ+0x0069 76AA JNA I8 _BUZZ_FIZZ+0x0015
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_BUZZ_FIZZ+0x006B 5F POP U64 RDI
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_BUZZ_FIZZ+0x006C 5E POP U64 RSI
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_BUZZ_FIZZ+0x006D 5D POP U64 RBP
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_BUZZ_FIZZ+0x006E C3 RET
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0000000000000001
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0000000000000002
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0000000000000003
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0000000000000004
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0000000000000005
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0000000000000006 FIZZ
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0000000000000007 BUZZ
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0000000000000008
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0000000000000009
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000000000000000A
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000000000000000B
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000000000000000C FIZZ
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000000000000000D
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000000000000000E BUZZ
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000000000000000F
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0000000000000010
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0000000000000011
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0000000000000012 FIZZ
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0000000000000013
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0000000000000014
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0000000000000015 BUZZ
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0000000000000016
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0000000000000017
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0000000000000018 FIZZ
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0000000000000019
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000000000000001A
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000000000000001B
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000000000000001C BUZZ
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000000000000001D
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000000000000001E FIZZ
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000000000000001F
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0000000000000020
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0000000000000021
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0000000000000022
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0000000000000023 BUZZ
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0000000000000024 FIZZ
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0000000000000025
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0000000000000026
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0000000000000027
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0000000000000028
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0000000000000029
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000000000000002A FIZZ BUZZ
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000000000000002B
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000000000000002C
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000000000000002D
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000000000000002E
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000000000000002F
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0000000000000030 FIZZ
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0000000000000031 BUZZ
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0000000000000032
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0000000000000033
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0000000000000034
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0000000000000035
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0000000000000036 FIZZ
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0000000000000037
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0000000000000038 BUZZ
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0000000000000039
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000000000000003A
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000000000000003B
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000000000000003C FIZZ
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000000000000003D
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000000000000003E
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000000000000003F BUZZ
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0000000000000040
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0000000000000041
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0000000000000042 FIZZ
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0000000000000043
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0000000000000044
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0000000000000045
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0000000000000046 BUZZ
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0000000000000047
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0000000000000048 FIZZ
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0000000000000049
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000000000000004A
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000000000000004B
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000000000000004C
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000000000000004D BUZZ
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000000000000004E FIZZ
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000000000000004F
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0000000000000050
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0000000000000051
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0000000000000052
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||||
0000000000000053
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0000000000000054 FIZZ BUZZ
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0000000000000055
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||||
0000000000000056
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0000000000000057
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0000000000000058
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0000000000000059
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000000000000005A FIZZ
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000000000000005B BUZZ
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000000000000005C
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000000000000005D
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000000000000005E
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000000000000005F
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0000000000000060 FIZZ
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0000000000000061
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0000000000000062 BUZZ
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0000000000000063
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0000000000000064
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*/
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@@ -0,0 +1,23 @@
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asm {
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DIV_U64_BY_U64::
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PUSH RBP
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MOV RBP,RSP
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XOR RDX,RDX
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MOV RCX,64
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MOV RAX,SF_ARG1[RBP]
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MOV RBX,SF_ARG2[RBP]
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@@1: SHL1 RAX
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RCL1 RDX
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CMP RBX,RDX
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JA @@2
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INC RAX
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SUB RDX,RBX
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@@2: LOOP @@1
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POP RBP
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RET1 16
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}
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_extern DIV_U64_BY_U64 I64 DivU64ByU64(I64 dividend,I64 divisor);
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"123456/10=%d\n",DivU64ByU64(123456,10);
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@@ -0,0 +1,72 @@
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/*
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When I was a kid with a Commodore 64,
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the 6502 chip had no multiply instruction
|
||||
and this is how we had to do it, except,
|
||||
I used more regs in this example.
|
||||
*/
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asm {
|
||||
//Opcodes are slightly different to make writing my x86_64 assembler easier.
|
||||
//See $LK,"::/Compiler/OpCodes.TXT"$.
|
||||
|
||||
USE64 //Defaults to 64, but this is a good habit.
|
||||
|
||||
//You can clobber RAX,RBX,RCX,RDX,R8,R9
|
||||
|
||||
MUL_BY_HAND_U8_U8_TO_U16: //This is only for fun.
|
||||
//8bit * 8bit-->16bit
|
||||
//AL*BL-->AX
|
||||
MOV CL,8
|
||||
SHL AX,8
|
||||
@@05: SHL1 AX
|
||||
JNC @@10
|
||||
ADD AL,BL
|
||||
@@10: DEC CL
|
||||
JNZ @@05
|
||||
RET
|
||||
|
||||
_MUL_BY_HAND_U8_U8_TO_U16:: //C callable
|
||||
PUSH RBP
|
||||
MOV RBP,RSP
|
||||
MOV AL,U8 SF_ARG1[RBP] //$LK,"SF_ARG1",A="FF:::/Kernel/Adam1a.HPP,SF_ARG1"$
|
||||
MOV BL,U8 SF_ARG2[RBP]
|
||||
CALL MUL_BY_HAND_U8_U8_TO_U16
|
||||
MOVZX RAX,AX
|
||||
POP RBP
|
||||
RET1 16
|
||||
|
||||
_MUL_U64_U64_TO_U128::
|
||||
//64bit * 64bit-->128bit
|
||||
PUSH RBP
|
||||
MOV RBP,RSP
|
||||
MOV RBX,U64 SF_ARG3[RBP]
|
||||
MOV RAX,U64 SF_ARG1[RBP] //$LK,"SF_ARG1",A="FF:::/Kernel/Adam1a.HPP,SF_ARG1"$
|
||||
MUL U64 SF_ARG2[RBP] //Result RDX:RAX 128bit
|
||||
MOV U64 [RBX],RAX
|
||||
MOV U64 8[RBX],RDX
|
||||
POP RBP
|
||||
RET1 24
|
||||
};
|
||||
|
||||
//My convention is to put an underscore
|
||||
//on C callable routines.
|
||||
_extern _MUL_BY_HAND_U8_U8_TO_U16 U16 MulU8(U8 n1,U8 n2);
|
||||
|
||||
class U128
|
||||
{
|
||||
U64 lo,hi;
|
||||
};
|
||||
|
||||
_extern _MUL_U64_U64_TO_U128 U0 MulU64(I64 n1,I64 n2,U128 *_prod);
|
||||
|
||||
U0 MulByHand()
|
||||
{
|
||||
U128 p;
|
||||
"2*7 =0x%X\n",MulU8(2,7);
|
||||
"100*10=0x%X\n",MulU8(100,10);
|
||||
|
||||
MulU64(0x0123456789ABCDEF,0x1000001,&p);
|
||||
"0x0123466789ABCDEF*0x1000001=0x%016X%016X\n",p.hi,p.lo;
|
||||
}
|
||||
|
||||
MulByHand;
|
||||
|
||||
@@ -0,0 +1,49 @@
|
||||
asm {
|
||||
PUT_DEC_U64::
|
||||
//RAX is number to print in decimal.
|
||||
//Preserves all regs.
|
||||
PUSH RBP
|
||||
MOV RBP,RSP
|
||||
SUB RSP,24 //24 char buffer on stack
|
||||
|
||||
//$LK,"Save regs",A="FF:::/Kernel/Adam1a.HPP,PUSH_C_REGS"$ which C code is free to clobber. We don't have to for C callers,
|
||||
//but this function will be nice for ASM callers if it saves all regs.
|
||||
PUSH_C_REGS
|
||||
|
||||
PUSH RSI //See $LK,"REG_VARS_MASK",A="MN:REG_VARS_MASK"$ & $LK,"REG_NON_PTR_MASK",A="MN:REG_NON_PTR_MASK"$
|
||||
LEA RSI,-1[RBP] //Load addr of end of buffer.
|
||||
//We picked RSI because of PUT_STR
|
||||
//We'll move backward
|
||||
MOV U8 [RSI],0 //Terminator
|
||||
|
||||
TEST RAX,RAX //Special case -- zero
|
||||
JNZ @@05
|
||||
DEC RSI
|
||||
MOV U8 [RSI],'0'
|
||||
JMP @@15
|
||||
|
||||
@@05: MOV RBX,10 //Divides by 10
|
||||
|
||||
@@10: XOR RDX,RDX
|
||||
DIV RBX //RAX=(RDX:RAX)/RBX with remainder in RDX
|
||||
ADD RDX,'0'
|
||||
DEC RSI
|
||||
MOV U8 [RSI],DL
|
||||
TEST RAX,RAX
|
||||
JNZ @@10
|
||||
|
||||
@@15: CALL PUT_STR
|
||||
POP RSI
|
||||
POP_C_REGS
|
||||
LEAVE
|
||||
RET
|
||||
|
||||
_DO_IT:: //The convention is C-callable routines have underscores.
|
||||
MOV RAX,122333221
|
||||
CALL PUT_DEC_U64
|
||||
PUSH 1
|
||||
CALL &NewLine //Print one carriage return
|
||||
RET
|
||||
}
|
||||
|
||||
Call(_DO_IT);
|
||||
Reference in new issue
Block a user