TempleOSCDV4.11.ISO
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Terry A. Davis authored and minexew committed
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#help_index "PCI;Processor;Devices;Info"
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//The file was downloaded from
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//http://www.pcidatabase.com/reports.php?type=tab-delimeted
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#define PCI_DEV_FILE "::/Misc/PCIDevices.DD.Z"
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/****
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//1) Plain text edit and remove file header and tail
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//2) Text find-and-replace "=0A=" with "".
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//3) Run PCIDevFileGen().
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public U0 PCIDevFileGen()
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{
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Bool first=TRUE,del=FALSE,del2=FALSE,cont=FALSE;
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CDoc *doc=DocRead(PCI_DEV_FILE,
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DOCF_PLAIN_TEXT|DOCF_DBL_DOLLARS|DOCF_NO_CURSOR);
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CDocEntry *doc_e=doc->head.next,*doc_e2;
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while (doc_e!=doc) {
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doc_e2=doc_e->next;
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if (first) {
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if (doc_e->type_u8==DOCT_TEXT) {
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if (doc_e->tag[0]==';')
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del=TRUE;
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}
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first=FALSE;
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}
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if (doc_e->type_u8==DOCT_TEXT && doc_e->tag[StrLen(doc_e->tag)-1]=='=' &&
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doc_e2->type_u8==DOCT_NEW_LINE) {
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doc_e->tag[StrLen(doc_e->tag)-1]=CH_SPACE;
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cont=TRUE;
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}
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del2=del;
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if (doc_e->type_u8==DOCT_NEW_LINE) {
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first=TRUE;
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del2=FALSE;
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if (cont) {
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del=TRUE;
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cont=FALSE;
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}
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}
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if (del)
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DocEntryDel(doc,doc_e);
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del=del2;
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doc_e=doc_e2;
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}
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DocWrite(doc);
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}
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****/
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//$LK,"::/Misc/PCIDevices.DD",A="PI:::/Misc/PCIDevices.DD"$
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U0 PCILookUpSingle(CDoc *doc,I64 m,I64 d,U8 **_vendor,U8 **_dev)
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{
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Bool first=TRUE;
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U8 buf[8],*vendor=NULL,*dev=NULL;
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CDocEntry *doc_e=doc->head.next;
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while (doc_e!=doc) {
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if (first) {
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if (doc_e->type_u8==DOCT_TEXT && doc_e->tag[0]!=';' &&
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StrLen(doc_e->tag)>=4) {
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buf[0](U16)='0x';
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buf[2](U32)=doc_e->tag(U32 *)[0];
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buf[6]=0;
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if (Str2I64(buf)==m) {
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doc_e=doc_e->next->next;
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if (doc_e->type_u8==DOCT_TEXT) {
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vendor=AStrNew(doc_e->tag);
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first=FALSE;
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break;
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}
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}
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}
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first=FALSE;
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}
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if (doc_e->type_u8==DOCT_NEW_LINE)
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first=TRUE;
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doc_e=doc_e->next;
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}
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if (vendor) {
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while (doc_e!=doc) {
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if (first) {
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if (doc_e->type_u8==DOCT_TAB) {
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doc_e=doc_e->next;
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if (doc_e->type_u8==DOCT_TEXT && StrLen(doc_e->tag)>=4) {
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buf[0](U16)='0x';
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buf[2](U32)=doc_e->tag(U32 *)[0];
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buf[6]=0;
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if (Str2I64(buf)==d) {
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doc_e=doc_e->next->next;
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if (doc_e->type_u8==DOCT_TEXT) {
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dev=AStrNew(doc_e->tag);
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break;
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}
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}
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}
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} else
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break;
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first=FALSE;
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}
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if (doc_e->type_u8==DOCT_NEW_LINE)
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first=TRUE;
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doc_e=doc_e->next;
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}
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}
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if (vendor)
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*_vendor=vendor;
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else
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*_vendor=AStrNew("Unknown");
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if (dev)
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*_dev=dev;
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else
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*_dev=AStrNew("Unknown");
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}
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U0 PCILookUpDevs()
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{
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CPCIDev *temppci;
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I64 w1,w2,b,d,f,timeout=32*8*2;
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CDoc *doc;
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if (dev.pci_head.next!=&dev.pci_head)
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return;
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doc=DocRead(PCI_DEV_FILE,DOCF_PLAIN_TEXT|DOCF_NO_CURSOR);
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for (b=0;b<sys_pci_busses;b++)
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for (d=0;d<32;d++)
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for (f=0;f<8;f++) {
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w1=PCIReadU16(b,d,f,0);
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if (w1!=0xFFFF) {
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temppci=ACAlloc(sizeof(CPCIDev));
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temppci->bus=b;
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temppci->dev=d;
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temppci->fun=f;
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temppci->vendor=w1;
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temppci->dev_id=w2=PCIReadU16(b,d,f,2);
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temppci->sub_code=PCIReadU8(b,d,f,0xA);
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temppci->base_code=PCIReadU8(b,d,f,0xB);
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PCILookUpSingle(doc,w1,w2,&temppci->vendor_str,&temppci->dev_id_str);
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QueIns(temppci,dev.pci_head.last);
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timeout=32*8*2;
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} else if (sys_pci_busses==256 && --timeout<=0)
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goto lud_done;
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}
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lud_done:
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DocDel(doc);
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}
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public U0 PCIRep()
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{//Report description of PCI devices.
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CPCIDev *temppci;
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"PCI Busses:%d\n",sys_pci_busses;
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if (!FileFind(PCI_DEV_FILE)) {
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"You don't have the PCI device file.\n";
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return;
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}
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PCILookUpDevs;
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temppci=dev.pci_head.next;
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while (temppci!=&dev.pci_head) {
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"%02X:%02X:%01X %02X%02X $$GREEN$$%s $$CYAN$$%s$$FG$$\n",
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temppci->bus,temppci->dev,temppci->fun,
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temppci->base_code,temppci->sub_code,
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temppci->vendor_str,temppci->dev_id_str;
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temppci=temppci->next;
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}
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}
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#help_index "Info;Time/CPU Cycles"
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class CCPURep
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{
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Bool mp_start,mp_end;
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I64 mp_not_done_flags,
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**swaps,
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**cycles;
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};
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U0 MPCPURep(CCPURep *cr)
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{
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I64 swaps=0,cycles_0,cycles_f;
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while (!cr->mp_start)
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Yield;
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cycles_0=GetTSC;
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while (!cr->mp_end) {
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swaps++;
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Yield;
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}
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cycles_f=GetTSC;
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cr->swaps[Gs->num]=swaps;
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cr->cycles[Gs->num]=cycles_f-cycles_0;
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LBtr(&cr->mp_not_done_flags,Gs->num);
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}
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public U0 CPURep(Bool full=FALSE)
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{//Report number of cores and clock freq.
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I64 i,total_swaps,total_cycles;
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F64 t0,tf;
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CCPURep cr;
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if (!full)
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"%d Cores %6h?nHz\n",mp_cnt,ToF64(cnts.time_stamp_freq);
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else {
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cr.swaps=CAlloc(sizeof(I64)*mp_cnt);
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cr.cycles=CAlloc(sizeof(I64)*mp_cnt);
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cr.mp_start=cr.mp_end=FALSE;
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cr.mp_not_done_flags=1<<mp_cnt-1;
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for (i=0;i<mp_cnt;i++)
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Spawn(&MPCPURep,&cr,NULL,i);
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t0=tS;
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cr.mp_start=TRUE;
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Sleep(2000);
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cr.mp_end=TRUE;
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while (cr.mp_not_done_flags)
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Yield;
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tf=tS;
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"\nCPU: %d Cores %6h?nHz\n",mp_cnt,ToF64(cnts.time_stamp_freq);
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"\n Context\n"
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"Core Swaps/s Cycles\n"
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"---- ------------- -----------------\n";
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total_swaps=0;
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total_cycles=0;
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for (i=0;i<mp_cnt;i++) {
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"%4d %13,d %17,d\n",i,
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ToI64(cr.swaps[i]/(tf-t0)),ToI64(cr.cycles[i]/(tf-t0));
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total_swaps+=cr.swaps[i];
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total_cycles+=cr.cycles[i];
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}
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"---- ------------- -----------------\n";
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"%4d %13,d %17,d\n",i,
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ToI64(total_swaps/(tf-t0)),ToI64(total_cycles/(tf-t0));
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" Avg %13,d %17,d\n\n",
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ToI64(total_swaps/(tf-t0)/i),ToI64(total_cycles/(tf-t0)/i);
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"Avg Cycles/Swap: %12.6f\n",ToF64(total_cycles)/total_swaps;
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"Avg Time/Swap : %12.6fns\n\n",(tf-t0)*1000000000.0*i/total_swaps;
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Free(cr.swaps);
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Free(cr.cycles);
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}
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}
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#help_index "Info;Memory/Info"
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public U0 MemBIOSRep()
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{//Report the memory ranges reported by the BIOS at boot.
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U16 *m01=SYS_MEM_E801;
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CMemE820 *m20=SYS_MEM_E820;
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CMemRange *tempmr;
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"Standard Addresses\n"
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"0x000A0000-0x000BFFFF VGA\n"
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"0xFEE00000-0xFEE00FFF See $$LK,\"APIC\",A=\"MN:LAPIC_BASE\"$$\n\n"
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"32 Bit Device Mem\n";
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while (LBts(&sys_semas[SYS_SEMA_DEV_MEM],0))
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Yield;
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tempmr=dev.mem32_head.next;
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while (tempmr!=&dev.mem32_head) {
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"%02X:0x%016X-0x%016X\n",
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tempmr->type,tempmr->base,tempmr->base+tempmr->size-1;
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tempmr=tempmr->next;
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}
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LBtr(&sys_semas[SYS_SEMA_DEV_MEM],0);
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"\nBIOS Memory Report 15:E801\n"
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"01:0x0000000000000000-0x%016X\n",0x100000+m01[0]<<10-1;
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"01:0x0000000001000000-0x%016X\n",0x1000000+m01[1]<<16-1;
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if (m20->type) {
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'\n';
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"BIOS Memory Report 15:E820\n";
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while (m20->type) {
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"%02X:0x%016X-0x%016X\n",m20->type,m20->base,m20->base+m20->len-1;
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m20++;
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}
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}
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}
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