TempleOSCDV4.11.ISO

Demo/Asm/AsmAndC1.HC

@@ -7,7 +7,7 @@ it from the cmd line.
 
 asm {
 //Opcodes are slightly different to make writing my x86_64 assembler easier.
-//See $LK,"::/Compiler/OpCodes.TXT"$.
+//See $LK,"::/Compiler/OpCodes.DD"$.
 
 	IMPORT	Beep;
 
@@ -16,7 +16,7 @@ _BEEPS::
 //See $LK,"REGG_CLOBBERED",A="MN:REGG_CLOBBERED"$ and $LK,"REGG_STK_TEMP",A="MN:REGG_STK_TEMP"$.
 	PUSH	RBP
 	MOV	RBP,RSP
-	MOV	RCX,U64 SF_ARG1[RBP]  //$LK,"SF_ARG1",A="FF:::/Kernel/KernelA.HPP,SF_ARG1"$
+	MOV	RCX,U64 SF_ARG1[RBP]  //$LK,"SF_ARG1",A="FF:::/Kernel/KernelA.HH,SF_ARG1"$
 
 @@05:	PUSH	RCX
 //U0 $LK,"Beep",A="MN:Beep"$(I64 freq=500,Bool busy=FALSE)
@@ -58,7 +58,7 @@ I64 AsmAndC1()
     MOV	RAX,RCX	//freq=loop*100.0+100.0
     IMUL2	RAX,100 //TempleOS uses nonstandard opcodes
 //to avoid multiple form of the same one.
-    //See $LK,"::/Compiler/OpCodes.TXT"$.
+    //See $LK,"::/Compiler/OpCodes.DD"$.
     ADD	RAX,100
     PUSH	RAX
     FILD	U64 [RSP]	//Convert from int to floating

Demo/Asm/AsmAndC2.HC

@@ -11,18 +11,18 @@ I64 glbl_hz=400,glbl_hz_step=100,glbl_hz_base=100;
 
 asm {
 //Opcodes are slightly different to make writing my x86_64 assembler easier.
-//See $LK,"::/Compiler/OpCodes.TXT"$.
+//See $LK,"::/Compiler/OpCodes.DD"$.
 
 JIFFIES_MSG:	DU8 "Jiffies:",0;
 
-//See $LK,"::/Kernel/StrA.CPP",A="FL:::/Kernel/StrA.CPP,1"$ and $LK,"::/Kernel/KUtils.CPP"$.
+//See $LK,"::/Kernel/StrA.HC",A="FL:::/Kernel/StrA.HC,1"$ and $LK,"::/Kernel/KUtils.HC"$.
 
 _BEEPS2::
 //You can clobber RAX,RBX,RCX,RDX,R8,R9.  The compiler expects that.
 //See $LK,"REGG_CLOBBERED",A="MN:REGG_CLOBBERED"$ and $LK,"REGG_STK_TEMP",A="MN:REGG_STK_TEMP"$.
 	PUSH	RBP
 	MOV	RBP,RSP
-	MOV	RCX,U64 SF_ARG1[RBP] //$LK,"SF_ARG1",A="FF:::/Kernel/KernelA.HPP,SF_ARG1"$
+	MOV	RCX,U64 SF_ARG1[RBP] //$LK,"SF_ARG1",A="FF:::/Kernel/KernelA.HH,SF_ARG1"$
 
 	PUSH	U64 [&cnts.jiffies]
 

Demo/Asm/AsmHelloWorld.HC

@@ -5,7 +5,7 @@ error, like when repeatedly #including
 it from the cmd line.
 
 These are many useful kernel
-routines $LK,"::/Kernel/StrA.CPP",A="FF:::/Kernel/StrA.CPP,PUT_CHARS"$
+routines $LK,"::/Kernel/StrA.HC",A="FF:::/Kernel/StrA.HC,PUT_CHARS"$
 intended to be called from
 asm.  Generally, they preserve
 regs.
@@ -21,7 +21,7 @@ from C, preserve all other regs.
 
 asm {
 //Opcodes are slightly different to make writing my x86_64 assembler easier.
-//See $LK,"::/Compiler/OpCodes.TXT"$.
+//See $LK,"::/Compiler/OpCodes.DD"$.
 
 MY_WORLD_MSG:
 //Define U8 does not put terminating zeros

Demo/Asm/MulByHand.HC

@@ -5,7 +5,7 @@ I used more regs in this example.
 */
 asm {
 //Opcodes are slightly different to make writing my x86_64 assembler easier.
-//See $LK,"::/Compiler/OpCodes.TXT"$.
+//See $LK,"::/Compiler/OpCodes.DD"$.
 
 //You can clobber RAX,RBX,RCX,RDX,R8,R9.  The compiler expects that.
 
@@ -24,7 +24,7 @@ MUL_BY_HAND_U8_U8_TO_U16: //This is only for fun.
 _MUL_BY_HAND_U8_U8_TO_U16::	//C callable
 	PUSH	RBP
 	MOV	RBP,RSP
-	MOV	AL,U8 SF_ARG1[RBP] //$LK,"SF_ARG1",A="FF:::/Kernel/KernelA.HPP,SF_ARG1"$
+	MOV	AL,U8 SF_ARG1[RBP] //$LK,"SF_ARG1",A="FF:::/Kernel/KernelA.HH,SF_ARG1"$
 	MOV	BL,U8 SF_ARG2[RBP]
 	CALL	MUL_BY_HAND_U8_U8_TO_U16
 	MOVZX	RAX,AX
@@ -36,7 +36,7 @@ _MUL_U64_U64_TO_U128::
 	PUSH	RBP
 	MOV	RBP,RSP
 	MOV	RBX,U64 SF_ARG3[RBP]
-	MOV	RAX,U64 SF_ARG1[RBP] //$LK,"SF_ARG1",A="FF:::/Kernel/KernelA.HPP,SF_ARG1"$
+	MOV	RAX,U64 SF_ARG1[RBP] //$LK,"SF_ARG1",A="FF:::/Kernel/KernelA.HH,SF_ARG1"$
 	MUL	U64 SF_ARG2[RBP]	//Res RDX:RAX 128bit
 	MOV	U64 [RBX],RAX
 	MOV	U64 8[RBX],RDX

Demo/Asm/PutDec.HC

@@ -6,7 +6,7 @@ PUT_DEC_U64::
 	MOV	RBP,RSP
 	SUB	RSP,24		//24 char buffer on stack
 
-//$LK,"Save regs",A="FF:::/Kernel/KernelA.HPP,PUSH_C_REGS"$ which C code is free to clobber.  We don't have to for C callers,
+//$LK,"Save regs",A="FF:::/Kernel/KernelA.HH,PUSH_C_REGS"$ which C code is free to clobber.  We don't have to for C callers,
 //but this function will be nice for ASM callers if it saves all regs.
 	PUSH_C_REGS