TempleOSCDV3.11.ISO
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@@ -23,7 +23,7 @@ U0 OptPass3(CCmpCtrl *cc,COptReg *reg_offsets)
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member_cnt+=2;
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mv=CAlloc(member_cnt*sizeof(COptMemberVar));
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member_cnt=0;
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tempm=cc->htc.fun->member_lst;
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tempm=cc->htc.fun->member_lst_and_root;
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while (tempm) {
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tempc=OptClassFwd(tempm->member_class);
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if (0<=tempm->reg<NUM_REGS) {
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@@ -448,7 +448,6 @@ here1:
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case IC_LBTC:
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case IC_BSF:
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case IC_BSR:
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case IC_PREEMPT:
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case IC_SIGN_I64:
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case IC_TOUPPER:
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case IC_TO_I64:
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@@ -562,7 +561,7 @@ R12 and R13 as non-pointer register variables, such as index variables i,j,k.
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}
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}
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if (j>0) {
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if (Bt(&cc->flags,CCf_OPT_TRACE_PRESENT))
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if (Bt(&cc->flags,CCf_PASS_TRACE_PRESENT))
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"Fun:%s\n",cc->htc.fun->str;
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if (j>cmp.num_reg_vars) {
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l=0;
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@@ -577,7 +576,7 @@ R12 and R13 as non-pointer register variables, such as index variables i,j,k.
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tempm->reg=cmp.non_ptr_vars_map[l++];
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reg_offsets[tempm->reg].offset=mv[i].offset_start;
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reg_offsets[tempm->reg].m=tempm;
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if (Bt(&cc->flags,CCf_OPT_TRACE_PRESENT))
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if (Bt(&cc->flags,CCf_PASS_TRACE_PRESENT))
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"Reg %Z Var \"%-15ts\" %016X[RBP]\n",tempm->reg,"ST_U64_REGS",
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tempm->str,reg_offsets[tempm->reg].offset;
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mv[i].offset_start=0; //flag as reg var
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@@ -606,7 +605,7 @@ R12 and R13 as non-pointer register variables, such as index variables i,j,k.
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tempm->reg=cmp.to_reg_vars_map[l++];
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reg_offsets[tempm->reg].offset=mv[i].offset_start;
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reg_offsets[tempm->reg].m=tempm;
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if (Bt(&cc->flags,CCf_OPT_TRACE_PRESENT))
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if (Bt(&cc->flags,CCf_PASS_TRACE_PRESENT))
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"Reg %Z Var \"%-15ts\" %016X[RBP]\n",tempm->reg,"ST_U64_REGS",
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tempm->str,reg_offsets[tempm->reg].offset;
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if (tempm->size<8 &&
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