TempleOSCD_150720.ISO
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@@ -1,15 +1,15 @@
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U0 OptPass3(CLex *lx,COptReg *reg_offsets)
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U0 OptPass3(CCmpCtrl *cc,COptReg *reg_offsets)
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{
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CHashClass *tempc,*tempc1,*tempc2;
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CLexCodeMisc *lb;
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CCodeMisc *lb;
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CIntermediateCode *tempi,*tempi1,*tempi2,*tempi_next,
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*tempil1,*tempil2;
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I64 code,i,j,l,member_cnt,used_reg_mask=0;
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CMemberLst *tempm;
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COptMemberVar *mv=NULL;
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CExe *tempx;
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CExeImportExport *tempe;
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CPrsStk *ps=lx->ps;
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CAOT *tempaot;
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CAOTImportExport *tempie;
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CPrsStk *ps=cc->ps;
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ps->ptr=0;
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ps->ptr2=0;
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@@ -17,19 +17,20 @@ U0 OptPass3(CLex *lx,COptReg *reg_offsets)
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reg_offsets[i].offset=MAX_I64;
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reg_offsets[i].m=NULL;
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}
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if (lx->htc.fun) {
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member_cnt=lx->htc.fun->member_cnt;
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if (Bt(&lx->htc.fun->flags,Ff_DOT_DOT_DOT))
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if (cc->htc.fun) {
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member_cnt=cc->htc.fun->member_cnt;
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if (Bt(&cc->htc.fun->flags,Ff_DOT_DOT_DOT))
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member_cnt+=2;
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mv=CAlloc(member_cnt*sizeof(COptMemberVar));
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member_cnt=0;
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tempm=lx->htc.fun->member_lst;
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tempm=cc->htc.fun->member_lst;
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while (tempm) {
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tempc=OptClassFwd(tempm->member_class);
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if (0<=tempm->reg<NUM_REGS) {
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if (Bts(&used_reg_mask,tempm->reg))
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PrintWarn("Reg in use\n $$LK,\"FL:%s,%d\"$$ '%s' in '%s'\n",
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lx->cur_lfn->full_name,lx->cur_lfn->line_num,tempm->str,lx->htc.fun->str);
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cc->lex_include_stk->full_name,
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cc->lex_include_stk->line_num,tempm->str,cc->htc.fun->str);
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reg_offsets[tempm->reg].offset=tempm->offset;
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reg_offsets[tempm->reg].m=tempm;
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} else if (tempc->raw_type!=RT_F64 && tempm->reg!=REG_NONE ||
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@@ -42,14 +43,15 @@ U0 OptPass3(CLex *lx,COptReg *reg_offsets)
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} else {
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if (tempm->reg==REG_ALLOC)
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PrintWarn("Can't reg var\n $$LK,\"FL:%s,%d\"$$ '%s' in '%s'\n",
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lx->cur_lfn->full_name,lx->cur_lfn->line_num,tempm->str,lx->htc.fun->str);
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cc->lex_include_stk->full_name,
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cc->lex_include_stk->line_num,tempm->str,cc->htc.fun->str);
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}
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tempm=tempm->next;
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}
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} else
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member_cnt=0;
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tempi=lx->lcc.lcc_root.next;
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tempi=cc->coc.coc_root.next;
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while (code=tempi->ic_code) {
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tempi_next=tempi->next;
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if (code==IC_NOP1)
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@@ -256,7 +258,8 @@ U0 OptPass3(CLex *lx,COptReg *reg_offsets)
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if (tempc) {
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if (tempc->raw_type==RT_F64 && tempil1->ic_class->raw_type!=RT_F64)
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tempil1->ic_flags|=ICF_R_TO_F64;
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else if (tempc->raw_type!=RT_F64 && tempil1->ic_class->raw_type==RT_F64)
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else if (tempc->raw_type!=RT_F64 &&
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tempil1->ic_class->raw_type==RT_F64)
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tempil1->ic_flags|=ICF_R_TO_INT;
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}
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break;
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@@ -272,23 +275,24 @@ U0 OptPass3(CLex *lx,COptReg *reg_offsets)
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break;
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case IC_NOBOUND_SWITCH:
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case IC_SWITCH:
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lb=OptLabelFwd(tempi->ic_data(CLexCodeMisc *)->dft);
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lb=OptLabelFwd(tempi->ic_data(CCodeMisc *)->dft);
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lb->use_cnt++;
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break;
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case IC_ASM:
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tempx=tempi->ic_data;
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tempe=tempx->next_ie;
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while (tempe!=&tempx->next_ie) {
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if (EIT_REL_I0<=tempe->type<=EIT_IMM_I64 &&
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tempe->str && tempe->flags&EIF_GOTO_LABEL &&
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(lb=LCCGoToLabelFind(lx,tempe->str)))
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tempaot=tempi->ic_data;
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tempie=tempaot->next_ie;
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while (tempie!=&tempaot->next_ie) {
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if (IET_REL_I0<=tempie->type<=IET_IMM_I64 &&
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tempie->str && tempie->flags&IEF_GOTO_LABEL &&
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(lb=COCGoToLabelFind(cc,tempie->str)))
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lb->use_cnt++; //Prevent deadcode elimination.
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tempe=tempe->next;
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tempie=tempie->next;
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}
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break;
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case IC_BR_NOT_EQUAL:
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case IC_BR_EQUAL_EQUAL:
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if ((tempi1->ic_code==IC_IMM_I64 || tempi1->ic_code==IC_IMM_F64) && !tempi1->ic_data) {
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if ((tempi1->ic_code==IC_IMM_I64 ||
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tempi1->ic_code==IC_IMM_F64) && !tempi1->ic_data) {
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OptFree(tempi1);
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MemCpy(&tempi->a1,&tempi->a2,sizeof(CICArg));
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tempi->a2.type=TY_NULL;
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@@ -298,7 +302,8 @@ U0 OptPass3(CLex *lx,COptReg *reg_offsets)
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code=tempi->ic_code=IC_BR_NOT_ZERO;
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tempi1=tempi2;
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tempc1=tempc2;
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} else if ((tempi2->ic_code==IC_IMM_I64 || tempi2->ic_code==IC_IMM_F64) && !tempi2->ic_data) {
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} else if ((tempi2->ic_code==IC_IMM_I64 ||
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tempi2->ic_code==IC_IMM_F64) && !tempi2->ic_data) {
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OptFree(tempi2);
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tempi->a2.type=TY_NULL;
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if (code==IC_BR_EQUAL_EQUAL)
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@@ -509,9 +514,9 @@ here1:
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case IC_LABEL:
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break;
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default:
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"Pass:%d Missing IC handler\n",lx->pass;
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ICPut(lx,tempi);
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LexExcept(lx,"Compiler Optimization Error at ");
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"Pass:%d Missing IC handler\n",cc->pass;
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ICPut(cc,tempi);
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LexExcept(cc,"Compiler Optimization Error at ");
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}
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}
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tempi=tempi_next;
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@@ -521,8 +526,8 @@ here1:
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We just scored num occurrences of each [RBP] offset in the code to help decide
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which variables should be assigned to register variables.
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We counted the times each offset was added to RBP as a plus LEA and we subtract the
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times the offset is dereferenced. If the address was calculated more times
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We counted the times each offset was added to RBP as a plus LEA and we subtract
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the times the offset is dereferenced. If the address was calculated more times
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than the offset was dereferenced, the variable's address was passed or assigned
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and we cannot use a register because you can't take address of a reg var.
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@@ -535,10 +540,11 @@ have a unusual ModR addressing mode in the x86_64 architecture, so I only use
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R12 and R13 as non-pointer register variables, such as index variables i,j,k.
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*/
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if (lx->htc.fun) {
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lx->htc.fun->used_reg_mask=lx->htc.fun->used_reg_mask&~(REG_VARS_MASK|REG_NON_PTR_MASK)|used_reg_mask;
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if (!Bt(&lx->opts,OPTf_NO_REG_VAR) &&
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!(lx->flags & LF_NO_REG_OPT)) {
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if (cc->htc.fun) {
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cc->htc.fun->used_reg_mask=cc->htc.fun->used_reg_mask&
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~(REGG_C_LOCAL_VARS|REGG_C_LOCAL_NON_PTR_VARS)|used_reg_mask;
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if (!Bt(&cc->opts,OPTf_NO_REG_VAR) &&
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!(cc->flags & CCF_NO_REG_OPT)) {
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QSort(mv,member_cnt,sizeof(COptMemberVar),&OptMVCompare);
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while (member_cnt && !mv[member_cnt-1].score)
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member_cnt--;
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@@ -551,12 +557,13 @@ R12 and R13 as non-pointer register variables, such as index variables i,j,k.
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} else {
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if (mv[i].m->reg==REG_ALLOC)
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PrintWarn("Can't reg var\n $$LK,\"FL:%s,%d\"$$ '%s' in '%s'\n",
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lx->cur_lfn->full_name,lx->cur_lfn->line_num,mv[i].m->str,lx->htc.fun->str);
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cc->lex_include_stk->full_name,
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cc->lex_include_stk->line_num,mv[i].m->str,cc->htc.fun->str);
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}
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}
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if (j>0) {
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if (Bt(&lx->flags,Lf_OPT_TRACE_PRESENT))
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"Fun:%s\n",lx->htc.fun->str;
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if (Bt(&cc->flags,CCf_OPT_TRACE_PRESENT))
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"Fun:%s\n",cc->htc.fun->str;
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if (j>cmp.num_reg_vars) {
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l=0;
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for (i=0;i<j && l<cmp.num_non_ptr_vars;i++) {
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@@ -564,22 +571,24 @@ R12 and R13 as non-pointer register variables, such as index variables i,j,k.
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tempc=OptClassFwd(tempm->member_class);
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if (!tempc->ptr_stars_cnt && !tempm->dim.next) {
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while (l<cmp.num_non_ptr_vars &&
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Bts(&lx->htc.fun->used_reg_mask,cmp.non_ptr_vars_map[l]))
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Bts(&cc->htc.fun->used_reg_mask,cmp.non_ptr_vars_map[l]))
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l++;
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if (l<cmp.num_non_ptr_vars) {
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tempm->reg=cmp.non_ptr_vars_map[l++];
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reg_offsets[tempm->reg].offset=mv[i].offset_start;
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reg_offsets[tempm->reg].m=tempm;
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if (Bt(&lx->flags,Lf_OPT_TRACE_PRESENT))
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if (Bt(&cc->flags,CCf_OPT_TRACE_PRESENT))
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"Reg %Z Var \"%-15ts\" %016X[RBP]\n",tempm->reg,"ST_U64_REGS",
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tempm->str,reg_offsets[tempm->reg].offset;
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mv[i].offset_start=0; //flag as reg var
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if (tempm->size<8 && !StrIMatch("Bool",tempm->member_class->str) &&
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if (tempm->size<8 &&
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!StrIMatch("Bool",tempm->member_class->str) &&
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tempm->member_class->type&HTT_INTERNAL_TYPE)
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PrintWarn("Using 64-bit reg var.\n "
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"$$LK,\"FL:%s,%d\"$$ '%s' in '%s'\n",
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lx->cur_lfn->full_name,lx->cur_lfn->line_num,
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tempm->str,lx->htc.fun->str);
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cc->lex_include_stk->full_name,
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cc->lex_include_stk->line_num,
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tempm->str,cc->htc.fun->str);
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}
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}
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}
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@@ -591,21 +600,23 @@ R12 and R13 as non-pointer register variables, such as index variables i,j,k.
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if (mv[i].offset_start && (!mv[i].m->dim.next||
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tempm->offset>0 && StrCmp(tempm->str,"argv"))) {
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while (l<cmp.num_reg_vars &&
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Bts(&lx->htc.fun->used_reg_mask,cmp.to_reg_vars_map[l]))
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Bts(&cc->htc.fun->used_reg_mask,cmp.to_reg_vars_map[l]))
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l++;
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if (l<cmp.num_reg_vars) {
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tempm->reg=cmp.to_reg_vars_map[l++];
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reg_offsets[tempm->reg].offset=mv[i].offset_start;
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reg_offsets[tempm->reg].m=tempm;
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if (Bt(&lx->flags,Lf_OPT_TRACE_PRESENT))
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if (Bt(&cc->flags,CCf_OPT_TRACE_PRESENT))
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"Reg %Z Var \"%-15ts\" %016X[RBP]\n",tempm->reg,"ST_U64_REGS",
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tempm->str,reg_offsets[tempm->reg].offset;
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if (tempm->size<8 && !StrIMatch("Bool",tempm->member_class->str) &&
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if (tempm->size<8 &&
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!StrIMatch("Bool",tempm->member_class->str) &&
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tempm->member_class->type&HTT_INTERNAL_TYPE)
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PrintWarn("Using 64-bit reg var.\n "
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"$$LK,\"FL:%s,%d\"$$ '%s' in '%s'\n",
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lx->cur_lfn->full_name,lx->cur_lfn->line_num,
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tempm->str,lx->htc.fun->str);
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cc->lex_include_stk->full_name,
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cc->lex_include_stk->line_num,
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tempm->str,cc->htc.fun->str);
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}
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}
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}
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@@ -614,8 +625,8 @@ R12 and R13 as non-pointer register variables, such as index variables i,j,k.
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Free(mv);
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}
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if (ps->ptr>2) {
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"Pass:%d Stk:%08X\n",lx->pass,ps->ptr;
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LexExcept(lx,"Compiler Optimization Error at ");
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"Pass:%d Stk:%08X\n",cc->pass,ps->ptr;
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LexExcept(cc,"Compiler Optimization Error at ");
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}
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}
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