Rijn/TempleOS-Rijn
1
1 Fork 0
Code Issues Pull Requests 1 Actions Packages Projects Releases Wiki Activity

TempleOSCD_150720.ISO

Browse Source
This commit is contained in:
Terry A. Davis authored and minexew committed 2018-09-08 21:46:22 +02:00
1 parent 401601816c
commit f8c05f98f4
554 files changed
+26046 -24853
Download Patch File Download Diff File Expand all files Collapse all files

No files matched your search

Demo/Asm/AsmAndC1.CPP
+18 -21
View File
@@ -9,12 +9,11 @@ asm {
//Opcodes are slightly different to make writing my x86_64 assembler easier.
//See $LK,"::/Compiler/OpCodes.TXT"$.
USE64 //Defaults to 64, but this is a good habit.
IMPORT Beep;
_BEEPS::
//You can always clobber RAX,RBX,RCX,RDX,R8,R9. The compiler expects that.
//See $LK,"REGG_C_CLOBBERED",A="MN:REGG_C_CLOBBERED"$ and $LK,"REGG_C_TEMP_CLOBBERED",A="MN:REGG_C_TEMP_CLOBBERED"$.
PUSH RBP
MOV RBP,RSP
MOV RCX,U64 SF_ARG1[RBP] //$LK,"SF_ARG1",A="FF:::/Kernel/KernelA.HPP,SF_ARG1"$
@@ -41,7 +40,7 @@ _extern _BEEPS U0 Beeps(I64 cnt);
I64 AsmAndC1()
{
I64 noreg i; //Normally this would be stored in a reg
//Check by unassembling with $LK,"Uf",A="MN:Uf"$("AsmAndC1").
//Check by unassembling with $LK,"Uf",A="MN:Uf"$("AsmAndC1").
i=GetI64("Num of beeps 1-5 (%d):",3,1,5);
Beeps(i);
@@ -49,31 +48,29 @@ I64 AsmAndC1()
asm {
//You can clobber RAX,RBX,RCX,RDX. The compiler expects that.
USE64 //Defaults to 64, but this is a good habit.
IMPORT Snd; //Import an not use & or don't import and use &Snd.
MOV RCX,&i[RBP] //You can clobber RAX,RBX,RCX,RDX.
//You better preserve the rest.
IMPORT Snd; //Import an not use & or don't import and use &Snd.
MOV RCX,&i[RBP] //You can clobber RAX,RBX,RCX,RDX.
//You better preserve the rest.
@@05: PUSH RCX
@@05: PUSH RCX
//U0 $LK,"Snd",A="MN:Snd"$(F64 freq);
MOV RAX,RCX //freq=loop*100.0+100.0
IMUL2 RAX,100 //TempleOS uses nonstandard opcodes
//to avoid multiple form of the same one.
//See $LK,"::/Compiler/OpCodes.TXT"$.
ADD RAX,100
PUSH RAX
FILD U64 [RSP] //Convert from int to floating
FSTP U64 [RSP]
MOV RAX,RCX //freq=loop*100.0+100.0
IMUL2 RAX,100 //TempleOS uses nonstandard opcodes
//to avoid multiple form of the same one.
//See $LK,"::/Compiler/OpCodes.TXT"$.
ADD RAX,100
PUSH RAX
FILD U64 [RSP] //Convert from int to floating
FSTP U64 [RSP]
CALL Snd
CALL Snd
MOV RCX,cnts.time_stamp_freq>>3 //JIT Const. Simple delay loop
MOV RCX,cnts.time_stamp_freq>>3 //JIT Const. Simple delay loop
@@10: LOOP @@10
POP RCX
LOOP @@05
POP RCX
LOOP @@05
}
Snd(0);
return i;
Demo/Asm/AsmAndC2.CPP
+15 -18
View File
@@ -13,14 +13,13 @@ asm {
//Opcodes are slightly different to make writing my x86_64 assembler easier.
//See $LK,"::/Compiler/OpCodes.TXT"$.
USE64 //Defaults to 64, but this is a good habit.
JIFFIES_MSG: DU8 "Jiffies:",0;
//See $LK,"::/Kernel/StrA.CPP",A="FL:::/Kernel/StrA.CPP,1"$ and $LK,"::/Kernel/KUtils.CPP"$.
_BEEPS2::
//You can clobber RAX,RBX,RCX,RDX,R8,R9. The compiler expects that.
//See $LK,"REGG_C_CLOBBERED",A="MN:REGG_C_CLOBBERED"$ and $LK,"REGG_C_TEMP_CLOBBERED",A="MN:REGG_C_TEMP_CLOBBERED"$.
PUSH RBP
MOV RBP,RSP
MOV RCX,U64 SF_ARG1[RBP] //$LK,"SF_ARG1",A="FF:::/Kernel/KernelA.HPP,SF_ARG1"$
@@ -35,7 +34,7 @@ _BEEPS2::
POP RCX
LOOP @@05
PUSH RSI //See $LK,"REG_VARS_MASK",A="MN:REG_VARS_MASK"$ & $LK,"REG_NON_PTR_MASK",A="MN:REG_NON_PTR_MASK"$
PUSH RSI //See $LK,"REGG_C_LOCAL_VARS",A="MN:REGG_C_LOCAL_VARS"$ & $LK,"REGG_C_LOCAL_NON_PTR_VARS",A="MN:REGG_C_LOCAL_NON_PTR_VARS"$
MOV RSI,JIFFIES_MSG
CALL PUT_STR
POP RSI
@@ -63,30 +62,28 @@ U0 AsmAndC2()
Beeps2(i);
asm {
LIST
LIST
//You can clobber RAX,RBX,RCX,RDX, but preserve the rest.
USE64 //Defaults to 64, but this is a good habit.
MOV RCX,R15 //You can clobber RAX,RBX,RCX,RDX. Preserve the rest.
MOV RCX,R15 //You can clobber RAX,RBX,RCX,RDX. Preserve the rest.
@@05: PUSH RCX
@@05: PUSH RCX
//U0 $LK,"Snd",A="MN:Snd"$(F64 freq);
MOV RAX,RCX //freq=loop*100.0+100.0
IMUL2 RAX,glbl_hz_step //evaluated at compile ttime
ADD RAX,U64 [&glbl_hz_base] //evaluated at run time
PUSH RAX
FILD U64 [RSP] //Convert from int to floating
FSTP U64 [RSP]
MOV RAX,RCX //freq=loop*100.0+100.0
IMUL2 RAX,glbl_hz_step //evaluated at compile ttime
ADD RAX,U64 [&glbl_hz_base] //evaluated at run time
PUSH RAX
FILD U64 [RSP] //Convert from int to floating
FSTP U64 [RSP]
CALL &Snd //We can skip IMPORT with & if JIT compiling.
CALL &Snd //We can skip IMPORT with & if JIT compiling.
MOV RCX,cnts.time_stamp_freq>>3 //JIT Const. Simple delay loop.
MOV RCX,cnts.time_stamp_freq>>3 //JIT Const. Simple delay loop.
@@10: LOOP @@10
POP RCX
LOOP @@05
POP RCX
LOOP @@05
}
Snd(0);
}
Demo/Asm/AsmAndC3.CPP
+5 -5
View File
@@ -10,11 +10,11 @@ U0 AsmAndC3()
I64 i;
for (i=0;i<3;i++) {
"Meaning of life:";
MOV AL,0x41
STC
ADC AL,0 //Round-about way to make the not-special constant, 0x42.
CALL PUT_HEX_U8
MOV RCX,cnts.time_stamp_freq>>5 //JIT Const. Simple delay loop.
MOV AL,0x41
STC
ADC AL,0 //Round-about way to make the not-special constant, 0x42.
CALL PUT_HEX_U8
MOV RCX,cnts.time_stamp_freq>>5 //JIT Const. Simple delay loop.
@@1: LOOP @@1
'\n';
}
Demo/Asm/AsmHelloWorld.CPP
+1 -3
View File
@@ -23,8 +23,6 @@ asm {
//Opcodes are slightly different to make writing my x86_64 assembler easier.
//See $LK,"::/Compiler/OpCodes.TXT"$.
USE64 //Defaults to 64, but this is a good habit.
MY_WORLD_MSG:
//Define U8 does not put terminating zeros
//on strings.
@@ -33,7 +31,7 @@ MY_WORLD_MSG:
//My convention is to put an underscore
//on C callable asm routines.
_HELLO_WORLD::
PUSH RSI //See $LK,"REG_VARS_MASK",A="MN:REG_VARS_MASK"$ & $LK,"REG_NON_PTR_MASK",A="MN:REG_NON_PTR_MASK"$
PUSH RSI //See $LK,"REGG_C_LOCAL_VARS",A="MN:REGG_C_LOCAL_VARS"$ & $LK,"REGG_C_LOCAL_NON_PTR_VARS",A="MN:REGG_C_LOCAL_NON_PTR_VARS"$
MOV RCX,10
@@05: MOV RAX,RCX
CALL PUT_HEX_U8
Demo/Asm/BuzzFizz.CPP
+1 -1
View File
@@ -8,7 +8,7 @@ asm {
_BUZZ_FIZZ::
PUSH RBP
MOV RBP,RSP //Always set-up stk frame. (Stack Gets Traced)
PUSH RSI //See $LK,"REG_VARS_MASK",A="MN:REG_VARS_MASK"$ & $LK,"REG_NON_PTR_MASK",A="MN:REG_NON_PTR_MASK"$
PUSH RSI //See $LK,"REGG_C_LOCAL_VARS",A="MN:REGG_C_LOCAL_VARS"$ & $LK,"REGG_C_LOCAL_NON_PTR_VARS",A="MN:REGG_C_LOCAL_NON_PTR_VARS"$
PUSH RDI
MOV RSI,FIZZ_SPAN-RANGE_START%FIZZ_SPAN+1
MOV RDI,BUZZ_SPAN-RANGE_START%BUZZ_SPAN+1
Demo/Asm/MulByHand.CPP
-2
View File
@@ -7,8 +7,6 @@ asm {
//Opcodes are slightly different to make writing my x86_64 assembler easier.
//See $LK,"::/Compiler/OpCodes.TXT"$.
USE64 //Defaults to 64, but this is a good habit.
//You can clobber RAX,RBX,RCX,RDX,R8,R9. The compiler expects that.
MUL_BY_HAND_U8_U8_TO_U16: //This is only for fun.
Demo/Asm/PutDec.CPP
+2 -2
View File
@@ -10,7 +10,7 @@ PUT_DEC_U64::
//but this function will be nice for ASM callers if it saves all regs.
PUSH_C_REGS
PUSH RSI //See $LK,"REG_VARS_MASK",A="MN:REG_VARS_MASK"$ & $LK,"REG_NON_PTR_MASK",A="MN:REG_NON_PTR_MASK"$
PUSH RSI //See $LK,"REGG_C_LOCAL_VARS",A="MN:REGG_C_LOCAL_VARS"$&$LK,"REGG_C_LOCAL_NON_PTR_VARS",A="MN:REGG_C_LOCAL_NON_PTR_VARS"$
LEA RSI,-1[RBP] //Load addr of end of buffer.
//We picked RSI because of PUT_STR
//We'll move bwd
@@ -38,7 +38,7 @@ PUT_DEC_U64::
LEAVE
RET
_DO_IT:: //The convention is C-callable routines have underscores.
_DO_IT:: //The convention is C-callable routines have underscores.
MOV RAX,122333221
CALL PUT_DEC_U64
MOV RAX,'\n'