728 lines
18 KiB
C++
728 lines
18 KiB
C++
Bool OptIC4(CIntermediateCode *tempi)
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{
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I64 i,ty,pt,ty1,pt1;
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CIntermediateCode *tempil1,*tempil2;
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if (tempi->ic_opcode<IC_IMM_U64) return FALSE;
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tempil1=tempi;
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if (!(tempil2=OptLag1(tempil1)))
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return FALSE;
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if (tempil2->r.type&TY_MASK==TY_STK &&
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!(tempil2->ic_flags&ICF_PUSH_RESULT)) {
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if (tempil1->ic_opcode==IC_ADD_CONST &&
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tempil1->p1.type&TY_MASK==TY_STK) {
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if ((tempil2->ic_opcode==IC_REG ||
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tempil2->ic_opcode==IC_MOV) &&
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tempil2->p1.type&TY_MASK==TY_REG) {
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i=tempil1->ic_data;
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if (MIN_I32<=i<=MAX_I32 &&
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!Bt(&non_ptr_vars_mask,tempil2->p1.reg)) {
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tempil1->ic_flags|=tempil2->ic_flags&ICG_NO_CVT_MASK;
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tempil1->ic_opcode=IC_LEA;
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tempil1->p1.type=TY_DISP+tempil1->p1.type&IT_MASK;
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tempil1->p1.reg=tempil2->p1.reg;
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tempil1->p1.disp=i;
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OptSetNOP1(tempil2);
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return TRUE;
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}
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} else if (tempil2->ic_opcode==IC_SHL_CONST &&
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tempil2->p1.type&TY_MASK==TY_REG) {
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i=tempil1->ic_data;
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if (MIN_I32<=i<=MAX_I32 &&
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tempil2->p1.reg!=CREG_RSP &&
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1<=tempil2->ic_data<=3) {
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tempil1->ic_flags|=tempil2->ic_flags&ICG_NO_CVT_MASK;
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tempil1->ic_opcode=IC_LEA;
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tempil1->p1.type=TY_SIB+tempil1->p1.type&IT_MASK;
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tempil1->p1.reg=tempil2->p1.reg<<8+CREG_NONE;
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if (tempil2->ic_data==1)
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tempil1->p1.reg|=0x4000;
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else if (tempil2->ic_data==2)
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tempil1->p1.reg|=0x8000;
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else
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tempil1->p1.reg|=0xC000;
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tempil1->p1.disp=i;
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OptSetNOP1(tempil2);
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return TRUE;
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}
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}
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}
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if (tempil2->ic_opcode==IC_MOV ||
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tempil2->ic_opcode==IC_REG) {
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if (tempil1->p2.type&TY_MASK==TY_STK) {
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if (tempil2->ic_flags & ICF_R_TO_INT) {
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if (tempil2->p1.type&TY_MASK==TY_IMM)
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tempil2->p1.disp=tempil2->p1.disp(F64);
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else
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tempil1->ic_flags|=ICF_P2_TO_INT;
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} else if (tempil2->ic_flags&ICF_R_TO_F64) {
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if (tempil2->p1.type&TY_MASK==TY_IMM)
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tempil2->p1.disp(F64)=tempil2->p1.disp;
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else
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tempil1->ic_flags|=ICF_P2_TO_F64;
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}
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ty=tempil1->p2.type&IT_MASK;
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ty1=tempil2->p1.type&IT_MASK;
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if (ty1 && ty1<ty)
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ty=ty1;
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ty1=tempil2->r.type&IT_MASK;
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if (ty1 && ty1<ty)
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ty=ty1;
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tempil1->p2.type=tempil2->p1.type&TY_MASK+ty;
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pt=tempil1->p2.ptype;
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pt1=tempil2->p1.ptype;
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if (pt1 && pt1<pt && pt!=IT_F64)
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pt=pt1;
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pt1=tempil2->r.ptype;
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if (pt1 && pt1<pt && pt!=IT_F64)
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pt=pt1;
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tempil1->p2.ptype=pt;
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tempil1->p2.reg=tempil2->p1.reg;
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tempil1->p2.disp=tempil2->p1.disp;
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tempil1->ic_flags|=tempil2->ic_flags&ICG_NO_CVT_MASK;
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OptSetNOP2(tempil2);
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return TRUE;
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}
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if (tempil1->p1.type&TY_MASK==TY_STK) {
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if (tempil2->ic_flags & ICF_R_TO_INT) {
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if (tempil2->p1.type&TY_MASK==TY_IMM)
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tempil2->p1.disp=tempil2->p1.disp(F64);
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else
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tempil1->ic_flags|=ICF_P1_TO_INT;
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} else if (tempil2->ic_flags&ICF_R_TO_F64) {
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if (tempil2->p1.type&TY_MASK==TY_IMM) {
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if (tempil2->p1.type&1) //signed/unsigned
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tempil2->p1.disp(F64)=tempil2->p1.disp(U64);
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else
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tempil2->p1.disp(F64)=tempil2->p1.disp(I64);
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} else
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tempil1->ic_flags|=ICF_P1_TO_F64;
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}
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ty=tempil1->p1.type&IT_MASK;
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ty1=tempil2->p1.type&IT_MASK;
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if (ty1 && ty1<ty)
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ty=ty1;
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ty1=tempil2->r.type&IT_MASK;
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if (ty1 && ty1<ty)
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ty=ty1;
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tempil1->p1.type=tempil2->p1.type&TY_MASK+ty;
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pt=tempil1->p1.ptype;
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pt1=tempil2->p1.ptype;
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if (pt1 && pt1<pt && pt!=IT_F64)
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pt=pt1;
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pt1=tempil2->r.ptype;
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if (pt1 && pt1<pt && pt!=IT_F64)
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pt=pt1;
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tempil1->p1.ptype=pt;
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tempil1->p1.reg=tempil2->p1.reg;
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tempil1->p1.disp=tempil2->p1.disp;
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tempil1->ic_flags|=tempil2->ic_flags&ICG_NO_CVT_MASK;
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OptSetNOP2(tempil2);
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return TRUE;
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}
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}
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if (tempil1->ic_opcode==IC_DEREF) {
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if (tempil2->ic_opcode==IC_ADD_CONST &&
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tempil2->p1.type&TY_MASK==TY_REG &&
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tempil1->p1.type&TY_MASK==TY_STK) {
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i=tempil2->ic_data;
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if (MIN_I32<=i<=MAX_I32 &&
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!Bt(&non_ptr_vars_mask,tempil2->p1.reg)) {
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tempil1->ic_flags|=tempil2->ic_flags;
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tempil1->ic_opcode=IC_MOV;
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tempil1->p1.type=TY_DISP+tempil1->p1.ptype;
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tempil1->p1.reg=tempil2->p1.reg;
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tempil1->p1.disp=i;
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OptSetNOP2(tempil2,-1);
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return TRUE;
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}
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}
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if (tempil2->ic_opcode==IC_LEA &&
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tempil1->p1.type&TY_MASK==TY_STK) {
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tempil1->ic_flags|=tempil2->ic_flags;
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tempil1->ic_opcode=IC_MOV;
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tempil1->p1.type=tempil2->p1.type&TY_MASK+tempil1->p1.ptype;
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tempil1->p1.reg=tempil2->p1.reg;
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tempil1->p1.disp=tempil2->p1.disp;
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OptSetNOP1(tempil2);
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return TRUE;
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}
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}
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}
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if (tempil1->ic_opcode==IC_DEREF) {
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if (tempil1->p1.type&TY_MASK==TY_REG) {
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tempil1->p1.type=TY_DISP+tempil1->p1.ptype;
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tempil1->p1.disp=0;
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tempil1->ic_opcode=IC_MOV;
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return TRUE;
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}
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}
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return FALSE;
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}
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U0 OptPass4(CLex *lx,COptReg *register_offsets,I64 *_type)
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{
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CHashClass *tempc,*tempc1,*tempc2,*tempc3;
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CIntermediateCode *tempi,*tempi1,*tempi2,*tempi3,*tempil1,*tempil2,*tempil3;
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I64 code,i;
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Bool dead_code=FALSE;
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CLexCodeMisc *lb;
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CPrsStk *ps=MAlloc(sizeof(CPrsStk));
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ps->ptr=0;
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ps->ptr2=0;
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if (_type)
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*_type=IT_I64;
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tempi=lx->lcc.lcc_root.next;
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while (code=tempi->ic_opcode) {
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if (dead_code&&code!=IC_LABEL)
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OptSetNOP1(tempi);
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else {
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tempc=tempi->ic_class;
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tempi1=tempi2=tempi3=&opt_nop;
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if (tempil1=OptLag2(tempi)) {
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if (tempil2=OptLag2(tempil1)) {
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if (!(tempil3=OptLag2(tempil2)))
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tempil3=&opt_nop;
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} else
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tempil2=tempil3=&opt_nop;
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} else
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tempil1=tempil2=tempil3=&opt_nop;
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nobound_switch (cmp_arg_cnt[code]) {
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case 9:
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ps->ptr-=tempi->ic_data>>3;
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break;
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case 3:
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tempi3=PrsPop(ps);
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tempc3=tempi3->ic_class;
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case 2:
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tempi2=PrsPop(ps);
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tempc2=tempi2->ic_class;
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case 1:
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tempi1=PrsPop(ps);
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tempc1=tempi1->ic_class;
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break;
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case 0: //nobound_switch
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break;
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}
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nobound_switch (code) {
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case IC_IMM_U64:
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case IC_TYPE:
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tempi->p1.type=TY_IMM+IT_I64;
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tempi->p1.disp=tempi->ic_data;
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tempi->ic_opcode=IC_MOV;
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break;
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case IC_IMM_F64:
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tempi->p1.type=TY_IMM+IT_I64;
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tempi->p1.disp=tempi->ic_data;
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tempi->p1.ptype=IT_F64;
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tempi->ic_opcode=IC_MOV;
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break;
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case IC_STR_CONST:
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case IC_FS:
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case IC_GS:
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case IC_MOV_FS:
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case IC_MOV_GS:
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case IC_RIP:
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case IC_RBP:
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case IC_REG:
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case IC_COM:
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case IC_HOLYC_TYPECAST:
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case IC_NOT:
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case IC_UNARY_MINUS:
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case IC_PUSH_CMP:
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break;
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case IC_MOV:
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if (tempi->p1.type&TY_MASK==TY_DISP &&
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tempi->p1.reg==CREG_RBP) {
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i=CmpOffset2Reg(tempi->p1.disp,register_offsets);
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if (i>=0) {
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tempi->p1.type=TY_REG+tempi->p1.type&IT_MASK;
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tempi->p1.reg=i;
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tempi->p1.disp=0;
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}
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}
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break;
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case IC_DEREF:
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if (tempi1->ic_opcode==IC_LEA) {
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if (tempi1->p1.type&TY_MASK==TY_DISP &&
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tempi1->p1.reg==CREG_RBP) {
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i=CmpOffset2Reg(tempi1->p1.disp,register_offsets);
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if (i>=0) {
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tempi->ic_flags|=tempi1->ic_flags;
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tempi->ic_opcode=IC_REG;
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tempi->p1.type=TY_REG+tempi->p1.type&IT_MASK;
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tempi->p1.reg=i;
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tempi->p1.disp=0;
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OptSetNOP1(tempi1);
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}
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}
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} else if ((tempi1->ic_opcode==IC_ABS_ADDR ||
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tempi1->ic_opcode==IC_MOV &&
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tempi1->p1.type==TY_IMM+IT_I64 &&
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0<=tempi1->p1.disp<=MAX_I32) &&
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!(tempi1->ic_flags&ICF_NO_RIP)) {
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if (tempi1->ic_opcode==IC_ABS_ADDR)
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tempi->p1.disp=tempi1->ic_data;
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else
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tempi->p1.disp=tempi1->p1.disp;
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tempi->ic_flags|=tempi1->ic_flags;
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tempi->ic_opcode=IC_MOV;
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tempi->p1.type=TY_RIP_DISP32+tempi->p1.ptype;
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tempi->p1.reg=CREG_RIP;
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OptSetNOP1(tempi1);
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}
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break;
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case IC_BR_MM_ZERO:
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case IC_BR_MM_NOT_ZERO:
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//(branch ++ to zero is unlikely)
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case IC_DEREF_PP:
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case IC_DEREF_MM:
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case IC__PP:
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case IC__MM:
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case IC_PP_:
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case IC_MM_:
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if (tempi1->ic_opcode==IC_LEA) {
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if (tempi1->p1.type&TY_MASK==TY_DISP &&
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tempi1->p1.reg==CREG_RBP) {
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i=CmpOffset2Reg(tempi1->p1.disp,register_offsets);
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if (i>=0) {
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tempi->ic_flags|=tempi1->ic_flags;
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tempi->p1.type=TY_REG+tempi->p1.type&IT_MASK;
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tempi->p1.reg=i;
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tempi->p1.disp=0;
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tempi->ic_flags|=ICF_NOT_ADDR;
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OptSetNOP2(tempi1);
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} else
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goto lea_gone;
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} else {
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lea_gone:
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tempi->ic_flags|=tempi1->ic_flags;
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tempi->p1.type=tempi1->p1.type;
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tempi->p1.reg=tempi1->p1.reg;
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tempi->p1.disp=tempi1->p1.disp;
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tempi->ic_flags|=ICF_NOT_ADDR;
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OptSetNOP2(tempi1);
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}
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} else if ((tempi1->ic_opcode==IC_ABS_ADDR ||
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tempi1->ic_opcode==IC_MOV &&
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tempi1->p1.type==TY_IMM+IT_I64 &&
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0<=tempi1->p1.disp<=MAX_I32) &&
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!(tempi1->ic_flags&ICF_NO_RIP)) {
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tempi->ic_flags|=tempi1->ic_flags;
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if (tempi1->ic_opcode==IC_ABS_ADDR)
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tempi->p1.disp=tempi1->ic_data;
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else
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tempi->p1.disp=tempi1->p1.disp;
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tempi->p1.type=TY_RIP_DISP32+tempi->p1.ptype;
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tempi->p1.reg=CREG_RIP;
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tempi->ic_flags|=ICF_NOT_ADDR;
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OptSetNOP1(tempi1);
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}
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break;
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case IC_ADD:
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if (tempi1->ic_opcode==IC_MOV && tempi1->p1.type==TY_REG+IT_I64 ||
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tempi1->ic_opcode==IC_REG) {
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if (tempi2->ic_opcode==IC_MOV && tempi2->p1.type==TY_REG+IT_I64 ||
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tempi2->ic_opcode==IC_REG) {
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if (tempi2->p1.reg!=CREG_RSP) {
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tempi->p1.disp=0;
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tempi->p1.reg=tempi1->p1.reg+tempi2->p1.reg<<8;
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goto sib;
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} else if (tempi1->p1.reg!=CREG_RSP) {
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tempi->p1.disp=0;
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tempi->p1.reg=tempi2->p1.reg+tempi1->p1.reg<<8;
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sib:
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tempi->ic_flags|=(tempi1->ic_flags|tempi2->ic_flags)&ICG_NO_CVT_MASK;
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OptSetNOP2(tempi1);
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OptSetNOP1(tempi2);
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tempi->ic_opcode=IC_LEA;
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tempi->p1.type=TY_SIB+IT_I64;
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tempi->p1.ptype=IT_I64;
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tempi->p2.type=TY_NULL+tempi->p2.type&IT_MASK;
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}
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} else if (tempi2->ic_opcode==IC_SHL_CONST && tempi2->p1.type==TY_REG+IT_I64 &&
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tempi2->ic_data<=3) {
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if (tempi2->p1.reg!=CREG_RSP) {
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tempi->p1.disp=0;
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tempi->p1.reg=tempi1->p1.reg+tempi2->p1.reg<<8;
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if (tempi2->ic_data==1)
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tempi->p1.reg|=0x4000;
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else if (tempi2->ic_data==2)
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tempi->p1.reg|=0x8000;
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else
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tempi->p1.reg|=0xC000;
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goto sib;
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}
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}
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} else if (tempi1->ic_opcode==IC_LEA && tempi1->p1.type&TY_MASK==TY_DISP) {
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if (tempi1->p1.reg==CREG_RBP && CmpOffset2Reg(tempi1->p1.disp,register_offsets)>=0)
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break;
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if (tempi2->ic_opcode==IC_MOV && tempi2->p1.type==TY_REG+IT_I64 ||
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tempi2->ic_opcode==IC_REG) {
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if (tempi2->p1.reg!=CREG_RSP) {
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tempi->p1.disp=tempi1->p1.disp;
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tempi->p1.reg=tempi1->p1.reg+tempi2->p1.reg<<8;
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goto sib;
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} else if (tempi1->p1.reg!=CREG_RSP) {
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tempi->p1.disp=tempi1->p1.disp;
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tempi->p1.reg=tempi2->p1.reg+tempi1->p1.reg<<8;
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goto sib;
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}
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} else if (tempi2->ic_opcode==IC_SHL_CONST && tempi2->p1.type==TY_REG+IT_I64 &&
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tempi2->ic_data<=3) {
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if (tempi2->p1.reg!=CREG_RSP) {
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tempi->p1.disp=tempi1->p1.disp;
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tempi->p1.reg=tempi1->p1.reg+tempi2->p1.reg<<8;
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if (tempi2->ic_data==1)
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tempi->p1.reg|=0x4000;
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else if (tempi2->ic_data==2)
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tempi->p1.reg|=0x8000;
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else
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tempi->p1.reg|=0xC000;
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goto sib;
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}
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}
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}
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break;
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case IC_SHL_CONST:
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case IC_LEA:
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case IC_SHR_CONST:
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case IC_POWER:
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case IC_SHL:
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case IC_SHR:
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case IC_MUL:
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case IC_DIV:
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case IC_MOD:
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case IC_AND:
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case IC_OR:
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case IC_XOR:
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case IC_SUB:
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case IC_EQUAL_EQUAL:
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case IC_NOT_EQUAL:
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case IC_LESS:
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case IC_GREATER:
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case IC_LESS_EQUAL:
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case IC_GREATER_EQUAL:
|
|
case IC_AND_AND:
|
|
case IC_OR_OR:
|
|
case IC_XOR_XOR:
|
|
break;
|
|
case IC_ASSIGN_PP:
|
|
case IC_ASSIGN_MM:
|
|
//this val was stashed during pass012 for pointer arithmetic
|
|
tempi->ic_class2=tempi->t.class2;
|
|
case IC_ASSIGN:
|
|
case IC_SHL_EQUAL:
|
|
case IC_SHR_EQUAL:
|
|
case IC_MUL_EQUAL:
|
|
case IC_DIV_EQUAL:
|
|
case IC_MOD_EQUAL:
|
|
case IC_AND_EQUAL:
|
|
case IC_OR_EQUAL:
|
|
case IC_XOR_EQUAL:
|
|
case IC_ADD_EQUAL:
|
|
case IC_SUB_EQUAL:
|
|
if (tempi1->ic_opcode==IC_LEA) {
|
|
if (TY_DISP<=tempi1->p1.type&TY_MASK<=TY_SIB) {
|
|
if (tempi1->p1.type&TY_MASK==TY_DISP && tempi1->p1.reg==CREG_RBP) {
|
|
i=CmpOffset2Reg(tempi1->p1.disp,register_offsets);
|
|
if (i>=0) {
|
|
tempi->ic_flags|=tempi1->ic_flags;
|
|
tempi->p1.type=TY_REG+tempi->p1.type&IT_MASK;
|
|
tempi->p1.reg=i;
|
|
tempi->p1.disp=0;
|
|
OptSetNOP2(tempi1);
|
|
} else {
|
|
tempi->ic_flags|=tempi1->ic_flags;
|
|
tempi->p1.type=TY_DISP+tempi->p1.type&IT_MASK;
|
|
tempi->p1.reg=CREG_RBP;
|
|
tempi->p1.disp=tempi1->p1.disp;
|
|
OptSetNOP2(tempi1);
|
|
}
|
|
} else {
|
|
tempi->p1.type=tempi1->p1.type&TY_MASK+tempi->p1.type&IT_MASK;
|
|
tempi->ic_flags|=tempi1->ic_flags;
|
|
tempi->p1.reg=tempi1->p1.reg;
|
|
tempi->p1.disp=tempi1->p1.disp;
|
|
OptSetNOP2(tempi1);
|
|
}
|
|
tempi->ic_flags|=ICF_NOT_ADDR;
|
|
}
|
|
} else if ((tempi1->ic_opcode==IC_ABS_ADDR ||
|
|
tempi1->ic_opcode==IC_MOV &&
|
|
tempi1->p1.type==TY_IMM+IT_I64 &&
|
|
0<=tempi1->p1.disp<=MAX_I32) &&
|
|
!(tempi1->ic_flags&ICF_NO_RIP)) {
|
|
tempi->ic_flags|=tempi1->ic_flags;
|
|
if (tempi1->ic_opcode==IC_ABS_ADDR)
|
|
tempi->p1.disp=tempi1->ic_data;
|
|
else
|
|
tempi->p1.disp=tempi1->p1.disp;
|
|
tempi->p1.type=TY_RIP_DISP32+tempi->p1.type&IT_MASK;
|
|
tempi->p1.reg=CREG_RIP;
|
|
tempi->ic_flags|=ICF_NOT_ADDR;
|
|
OptSetNOP2(tempi1);
|
|
}
|
|
break;
|
|
case IC_ADD_CONST:
|
|
case IC_SUB_CONST:
|
|
case IC_ENTER:
|
|
case IC_ADD_RSP:
|
|
case IC_ADD_RSP1:
|
|
case IC_CALL:
|
|
case IC_CALL_INDIRECT:
|
|
case IC_CALL_INDIRECT2:
|
|
case IC_CALL_EXTERN:
|
|
case IC_CALL_IMPORT:
|
|
case IC_CLI:
|
|
case IC_STI:
|
|
case IC_HLT:
|
|
case IC_PUSHFD:
|
|
case IC_POPFD:
|
|
case IC_PUSH:
|
|
case IC_POP:
|
|
case IC_CLD:
|
|
case IC_STD:
|
|
case IC_INVLPG:
|
|
case IC_CLFLUSH:
|
|
case IC_PAUSE:
|
|
case IC_GET_RFLAGS:
|
|
case IC_CARRY:
|
|
case IC_RDTSC:
|
|
case IC_HPET:
|
|
case IC_SET_RFLAGS:
|
|
case IC_GET_RBP:
|
|
case IC_SET_RBP:
|
|
case IC_GET_RSP:
|
|
case IC_GET_RAX:
|
|
case IC_SET_RSP:
|
|
case IC_SET_RAX:
|
|
break;
|
|
case IC_RETURN_VAL:
|
|
case IC_RETURN_VAL2:
|
|
if (!tempi->ic_class) {
|
|
if (_type) {
|
|
tempil1=tempi;
|
|
while (tempil1=OptLag1(tempil1))
|
|
if (tempil1->ic_class) {
|
|
if (tempil1->ic_flags & ICF_R_TO_F64)
|
|
*_type=IT_F64;
|
|
else if (tempil1->ic_flags & ICF_R_TO_INT)
|
|
*_type=IT_I64;
|
|
else
|
|
*_type=tempil1->ic_class->sub_type;
|
|
break;
|
|
}
|
|
}
|
|
tempi->ic_class=sys_internal_types[IT_I64];
|
|
} else if (_type)
|
|
*_type=tempi->ic_class->sub_type;
|
|
break;
|
|
case IC_GET_LABEL:
|
|
case IC_ABS_ADDR:
|
|
case IC_HEAP_GLBL:
|
|
case IC_ADDR_IMPORT:
|
|
case IC_BSF:
|
|
case IC_BSR:
|
|
case IC_PREEMPT:
|
|
case IC_SIGN_I64:
|
|
case IC_TOUPPER:
|
|
case IC_TO_I64:
|
|
case IC_TO_F64:
|
|
case IC_TO_BOOL:
|
|
case IC_SQR:
|
|
case IC_ABS:
|
|
case IC_SQRT:
|
|
case IC_SIN:
|
|
case IC_COS:
|
|
case IC_TAN:
|
|
case IC_ATAN:
|
|
case IC_ABS_I64:
|
|
case IC_MIN_I64:
|
|
case IC_MAX_I64:
|
|
case IC_MIN_U64:
|
|
case IC_MAX_U64:
|
|
case IC_MOD_U64:
|
|
case IC_SQR_I64:
|
|
case IC_SQR_U64:
|
|
case IC_SWAP_U8:
|
|
case IC_SWAP_U16:
|
|
case IC_SWAP_U32:
|
|
case IC_SWAP_U64:
|
|
case IC_QUE_INIT:
|
|
case IC_QUE_INS:
|
|
case IC_QUE_INS_REV:
|
|
case IC_QUE_REM:
|
|
case IC_IN_U32:
|
|
case IC_IN_U16:
|
|
case IC_IN_U8:
|
|
case IC_STRLEN:
|
|
case IC_OUT_U32:
|
|
case IC_OUT_U16:
|
|
case IC_OUT_U8:
|
|
case IC_NOBOUND_SWITCH:
|
|
case IC_SWITCH:
|
|
case IC_RET:
|
|
case IC_END:
|
|
case IC_ADDR:
|
|
case IC_IRQ:
|
|
case IC_NOP1:
|
|
case IC_CALL_START:
|
|
case IC_LEAVE:
|
|
case IC_PUSH_REGS:
|
|
case IC_POP_REGS:
|
|
case IC_ASM:
|
|
case IC_BR_AND_NOT_ZERO:
|
|
case IC_BR_AND_ZERO:
|
|
break;
|
|
case IC_BR_BT:
|
|
case IC_BR_BTS:
|
|
case IC_BR_BTR:
|
|
case IC_BR_BTC:
|
|
case IC_BR_NOT_BT:
|
|
case IC_BR_NOT_BTS:
|
|
case IC_BR_NOT_BTR:
|
|
case IC_BR_NOT_BTC:
|
|
case IC_BR_LBTS:
|
|
case IC_BR_LBTR:
|
|
case IC_BR_LBTC:
|
|
case IC_BR_NOT_LBTS:
|
|
case IC_BR_NOT_LBTR:
|
|
case IC_BR_NOT_LBTC:
|
|
case IC_BT:
|
|
case IC_BTS:
|
|
case IC_BTR:
|
|
case IC_BTC:
|
|
case IC_LBTS:
|
|
case IC_LBTR:
|
|
case IC_LBTC:
|
|
if (!(tempi->ic_flags&ICF_NOT_ADDR)) {
|
|
if (tempi2->ic_opcode==IC_ADDR) {
|
|
if (tempi2->p1.type&TY_MASK==TY_STK &&
|
|
tempi2->r.type&TY_MASK==TY_STK) {
|
|
if (!(tempil2=OptLag1(tempi2)) ||
|
|
tempil2->ic_opcode!=IC_ABS_ADDR &&
|
|
!(tempil2->ic_opcode==IC_MOV &&
|
|
tempil2->p1.type==TY_IMM+IT_I64 &&
|
|
0<=tempil2->p1.disp<=MAX_I32) ||
|
|
tempil2->ic_flags&ICF_NO_RIP)
|
|
tempil2=NULL;
|
|
else {
|
|
if (tempil2->ic_opcode==IC_ABS_ADDR)
|
|
tempi->p2.disp=tempil2->ic_data;
|
|
else
|
|
tempi->p2.disp=tempil2->p1.disp;
|
|
}
|
|
} else {
|
|
if (tempi2->p1.type==TY_IMM+IT_I64 &&
|
|
0<=tempi2->p1.disp<=MAX_I32 &&
|
|
!(tempi2->ic_flags&ICF_NO_RIP)) {
|
|
tempil2=tempi2;
|
|
tempi2=NULL;
|
|
tempi->p2.disp=tempil2->p1.disp;
|
|
} else
|
|
tempil2=NULL;
|
|
}
|
|
if (tempil2) {
|
|
if (tempi2) {
|
|
tempi->ic_flags|=tempi2->ic_flags;
|
|
OptSetNOP1(tempi2);
|
|
}
|
|
tempi->ic_flags|=tempil2->ic_flags|ICF_NOT_ADDR;
|
|
tempi->p2.type=TY_RIP_DISP32+tempi->p2.type&IT_MASK;
|
|
tempi->p2.reg=CREG_RIP;
|
|
OptSetNOP1(tempil2);
|
|
}
|
|
} else if (tempi2->ic_opcode==IC_MOV &&
|
|
tempi2->r.type&TY_MASK==TY_STK &&
|
|
tempi2->p1.type==TY_IMM+IT_I64 &&
|
|
0<=tempi2->p1.disp<=MAX_I32 &&
|
|
!(tempi2->ic_flags&ICF_NO_RIP)) {
|
|
tempi->p2.disp=tempi2->p1.disp;
|
|
tempi->ic_flags|=tempi2->ic_flags|ICF_NOT_ADDR;
|
|
tempi->p2.type=TY_RIP_DISP32+tempi->p2.type&IT_MASK;
|
|
tempi->p2.reg=CREG_RIP;
|
|
OptSetNOP1(tempi2);
|
|
}
|
|
}
|
|
break;
|
|
case IC_BR_NOT_EQUAL2:
|
|
case IC_BR_EQUAL_EQUAL2:
|
|
case IC_BR_GREATER_EQUAL2:
|
|
case IC_BR_LESS_EQUAL2:
|
|
case IC_BR_GREATER2:
|
|
case IC_BR_LESS2:
|
|
|
|
case IC_BR_ZERO:
|
|
case IC_BR_NOT_ZERO:
|
|
case IC_BR_NOT_EQUAL:
|
|
case IC_BR_EQUAL_EQUAL:
|
|
case IC_BR_GREATER_EQUAL:
|
|
case IC_BR_LESS_EQUAL:
|
|
case IC_BR_GREATER:
|
|
case IC_BR_LESS:
|
|
lb=tempi->ic_data;
|
|
if (tempi->ic_flags&ICF_PUSH_CMP) {
|
|
lb->flags|=CMF_POP_CMP;
|
|
lb->fwd=NULL;
|
|
}
|
|
break;
|
|
case IC_LABEL:
|
|
lb=tempi->ic_data;
|
|
if (lb->flags&CMF_USED)
|
|
dead_code=FALSE;
|
|
break;
|
|
case IC_JMP:
|
|
dead_code=TRUE;
|
|
break;
|
|
case IC_NOP2:
|
|
ps->ptr+=tempi->ic_data;
|
|
break;
|
|
case IC_CALL_END2:
|
|
break;
|
|
case IC_CALL_END:
|
|
case IC_END_EXP:
|
|
if (tempi->p1.type&TY_MASK==TY_STK) {
|
|
if (tempil1->r.type&TY_MASK==TY_STK &&
|
|
!(tempil1->ic_flags&ICF_PUSH_RESULT)) {
|
|
tempi->p1.type=TY_REG+tempi->p1.type&IT_MASK;
|
|
tempi->p1.reg=CREG_RAX;
|
|
tempi->p1.disp=0;
|
|
tempil1->r.type=TY_REG+tempil1->r.type&IT_MASK;
|
|
tempil1->r.reg=CREG_RAX;
|
|
tempil1->r.disp=0;
|
|
}
|
|
}
|
|
break;
|
|
default:
|
|
"Pass:%d Missing IC handler\n",lx->pass;
|
|
ICPut(tempi);
|
|
LexExcept(lx,"ST_OPT_INTERNAL_ERROR");
|
|
}
|
|
|
|
while (OptIC4(tempi));
|
|
code=tempi->ic_opcode;
|
|
if (cmp_result_cnt[code])
|
|
PrsPush(ps,tempi);
|
|
}
|
|
tempi=tempi->next;
|
|
}
|
|
if (ps->ptr>2) {
|
|
"Pass:%d Stk:%08X\n",lx->pass,ps->ptr;
|
|
LexExcept(lx,"ST_OPT_INTERNAL_ERROR");
|
|
}
|
|
Free(ps);
|
|
}
|