611 lines
15 KiB
C++
611 lines
15 KiB
C++
#help_index "Snd/HDAudio"
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#define HD_1_CHAN 0
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#define HD_2_CHAN 1
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#define HD_3_CHAN 2
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#define HD_4_CHAN 3
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#define HD_8_BIT 0
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#define HD_16_BIT 1
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#define HD_20_BIT 2
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#define HD_24_BIT 3
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#define HD_32_BIT 4
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#define HD_48kHz 0
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#define HD_DFT_OUT_FMT (HD_2_CHAN+HD_24_BIT<<4+HD_48kHz<<8)
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#define HD_DFT_IN_FMT (HD_2_CHAN+HD_16_BIT<<4+HD_48kHz<<8)
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#define HD_POS_BUF_MULTIPLES 0x1000
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#define HD_CORB_ENTRIES 256
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#define HD_RIRB_ENTRIES 256
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#define HD_BDL_ENTRIES 256
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#define HD_GCTL 0x08
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#define HD_STATESTS 0x0E
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#define HD_GSTS 0x10
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#define HD_CORBLBASE 0x40
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#define HD_CORBUBASE 0x44
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#define HD_CORBWP 0x48
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#define HD_CORBRP 0x4A
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#define HD_CORBCTL 0x4C
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#define HD_CORBST 0x4D
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#define HD_RIRBLBASE 0x50
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#define HD_RIRBUBASE 0x54
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#define HD_RIRBWP 0x58
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#define HD_RIRBCTL 0x5C
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#define HD_RIRBSTS 0x5D
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#define STRCTL 0x00
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#define STRSTS 0x03
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#define STRLPIB 0x04
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#define STRCBL 0x08
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#define STRLVI 0x0C
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#define STRFIFOW 0x0E
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#define STRFIFOS 0x10
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#define STRFMT 0x12
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#define STRBDPL 0x18
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#define STRBDPU 0x1C
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#define ISTR0 0x080
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#define ISTR1 0x0A0
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#define ISTR2 0x0C0
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#define ISTR3 0x0E0
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#define OSTR0 0x100
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#define OSTR1 0x120
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#define OSTR2 0x140
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#define OSTR3 0x160
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#define VERB_GET_PARAM 0xF0000
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#define VERB_CONNECT_SELECT_GET 0xF0100
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#define VERB_CONNECT_SELECT_SET 0x70100
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#define VERB_GET_CONNECT_LIST 0xF0200
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#define VERB_PROCESS_STATE_GET 0xF0300
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#define VERB_PROCESS_STATE_SET 0x70300
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#define VERB_COEFF_INDEX_GET 0xD0000
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#define VERB_COEFF_INDEX_SET 0x50000
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#define VERB_PROCESS_COEFF_GET 0xC0000
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#define VERB_PROCESS_COEFF_SET 0x40000
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#define VERB_AMPLIFIER_GAIN_GET 0xB0000
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#define VERB_AMPLIFIER_GAIN_SET 0x30000
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#define VERB_STREAM_FMT_GET 0xA0000
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#define VERB_STREAM_FMT_SET 0x20000
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#define VERB_DIGIT_CONVERT1_GET 0xF0D00
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#define VERB_DIGIT_CONVERT1_SET 0x70D00
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#define VERB_DIGIT_CONVERT2_GET 0xF0D00
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#define VERB_DIGIT_CONVERT2_SET 0x70E00
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#define VERB_POWER_STATE_GET 0xF0500
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#define VERB_POWER_STATE_SET 0x70500
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#define VERB_CHAN_STREAM_ID_GET 0xF0600
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#define VERB_CHAN_STREAM_ID_SET 0x70600
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#define VERB_SDI_SELECT_GET 0xF0400
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#define VERB_SDI_SELECT_SET 0x70400
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#define VERB_PIN_WIDGET_CTL_GET 0xF0700
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#define VERB_PIN_WIDGET_CTL_SET 0x70700
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#define VERB_UNSOL_ENABLE_GET 0xF0800
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#define VERB_UNSOL_ENABLE_SET 0x70800
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#define VERB_PIN_SENSE_GET 0xF0900
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#define VERB_PIN_SENSE_SET 0x70900
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#define VERB_EAPDBTL_ENABLE_GET 0xF0C00
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#define VERB_EAPDBTL_ENABLE_SET 0x70C00
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#define VERB_BEEP_CTL_GET 0xF0A00
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#define VERB_BEEP_CTL_SET 0x70A00
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#define VERB_GPI_CTRL0_GET 0xF1000
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#define VERB_GPI_CTRL0_SET 0x71000
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#define VERB_GPI_CTRL1_GET 0xF1100
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#define VERB_GPI_CTRL1_SET 0x71100
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#define VERB_GPI_CTRL2_GET 0xF1200
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#define VERB_GPI_CTRL2_SET 0x71200
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#define VERB_GPI_CTRL3_GET 0xF1300
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#define VERB_GPI_CTRL3_SET 0x71300
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#define VERB_GPI_CTRL4_GET 0xF1400
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#define VERB_GPI_CTRL4_SET 0x71400
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#define VERB_GPI_CTRL5_GET 0xF1500
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#define VERB_GPI_CTRL5_SET 0x71500
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#define VERB_GPI_CTRL6_GET 0xF1600
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#define VERB_GPI_CTRL6_SET 0x71600
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#define VERB_GPI_CTRL7_GET 0xF1700
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#define VERB_GPI_CTRL7_SET 0x71700
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#define VERB_GPI_CTRL8_GET 0xF1800
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#define VERB_GPI_CTRL8_SET 0x71800
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#define VERB_GPI_CTRL9_GET 0xF1900
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#define VERB_GPI_CTRL9_SET 0x71900
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#define VERB_GPI_CTRLA_GET 0xF1A00
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#define VERB_GPI_CTRLA_SET 0x71A00
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#define VERB_VOL_CTL_GET 0xF0F00
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#define VERB_VOL_CTL_SET 0x70F00
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#define VERB_SUB_SYS_ID0_GET 0xF2000
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#define VERB_SUB_SYS_ID0_SET 0x72000
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#define VERB_SUB_SYS_ID1_GET 0xF2000
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#define VERB_SUB_SYS_ID1_SET 0x72100
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#define VERB_SUB_SYS_ID2_GET 0xF2000
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#define VERB_SUB_SYS_ID2_SET 0x72200
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#define VERB_SUB_SYS_ID3_GET 0xF2000
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#define VERB_SUB_SYS_ID3_SET 0x72300
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#define VERB_CFG_DFT0_GET 0xF1C00
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#define VERB_CFG_DFT0_SET 0x71C00
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#define VERB_CFG_DFT1_GET 0xF1C00
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#define VERB_CFG_DFT1_SET 0x71D00
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#define VERB_CFG_DFT2_GET 0xF1C00
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#define VERB_CFG_DFT2_SET 0x71E00
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#define VERB_CFG_DFT3_GET 0xF1C00
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#define VERB_CFG_DFT3_SET 0x71F00
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#define VERB_STRIPE_CTL_GET 0xF2400
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#define VERB_STRIPE_CTL_SET 0x72400
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#define VERB_RST 0x7FF00
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//Parameters
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#define P_VENDOR_ID 0x00
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#define P_REVISION_ID 0x02
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#define P_SUBNODE_CNT 0x04
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#define P_FUN_GRP_TYPE 0x05
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#define P_AUDIO_FUN_CAP 0x08
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#define P_AUDIO_WIDGET_CAP 0x09
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#define P_SAMPLE_SIZE_RATE_CAP 0x0A
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#define P_STREAM_FMTS 0x0B
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#define P_PIN_CAP 0x0C
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#define P_INPUT_AMP_CAP 0x0D
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#define P_OUTPUT_AMP_CAP 0x12
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#define P_CONNECT_LIST_LEN 0x0E
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#define P_POWER_STATES 0x0F
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#define P_PROCESSING_CAP 0x10
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#define P_GPIO_CNT 0x11
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#define P_VOL_KNOB_CAP 0x13
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//Function Group Types
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//00 reserved
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#define FGT_AUDIO 1
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#define FGT_VENDOR_MODEM 2
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//03-7F reserved
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//80-FF vendor function group
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//Audio Widget Types
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#define AWT_OUTPUT 0x0
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#define AWT_INPUT 0x1
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#define AWT_MIXER 0x2
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#define AWT_SELECTOR 0x3
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#define AWT_PIN_COMPLEX 0x4
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#define AWT_POWER_WIDGET 0x5
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#define AWT_VOL_KNOB_WIDGET 0x6
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#define AWT_BEEP_GEN_WIDGET 0x7
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#define AWT_VENDOR 0xF
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#define AWT_NODE 0x10
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DefineListLoad("ST_AUDIO_WIDGET_TYPES",
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"Output\0Input\0Mixer\0Selector\0Pin Complex\0"
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"Power Widget\0Vol Knob\0Beep Gen\0 \0 \0 \0 \0 \0 \0 \0Vendor\0Node\0");
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class CHDBufDesc
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{
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I32 *buf;
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U32 len;
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U32 ctrl;
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};
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class CHDAudioCtrl
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{
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U8 *bar;
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I64 cad;
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U32 *corb;
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I64 *rirb;
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CHDBufDesc *ostr0_bdl,*istr0_bdl;
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SND_OUT_CONTAINER *ostr0_buf[2];
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SND_IN_CONTAINER *istr0_buf[2];
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CTask *task;
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I64 waveform;
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F64 freq,amp;
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CSndWaveCtrl *sc;
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U8 rirb_rp,corb_wp;
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Bool audio_task_started,in_running,out_running;
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} *_hda=NULL;
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I64 AudioSize()
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{//$LK,"MemRep","MN:MemRep"$ uses this for Adam Heap
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I64 result=MSize2(snd_reverb_buf);
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if (_hda) {
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result+=MSize2(_hda);
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/* uncached heap
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result+=MSize2(_hda->corb)+MSize(_hda->rirb);
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result+=MSize2(_hda->ostr0_bdl);
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result+=MSize2(_hda->istr0_bdl);
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for (i=0;i<2;i++)
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result+=MSize2(_hda->ostr0_buf[i]);
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for (i=0;i<2;i++)
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result+=MSize2(_hda->istr0_buf[i]);
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*/
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}
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return result;
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}
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U0 HDSyncCORB()
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{
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U16 *wp,*rp;
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wp =_hda->bar+HD_CORBWP;
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*wp=_hda->corb_wp;
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rp =_hda->bar+HD_CORBRP;
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while (*rp&255!=_hda->corb_wp)
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Yield;
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}
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U0 HDWriteCORB(I64 cad,I64 nid,U32 val)
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{
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val|=cad<<28+nid<<20;
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_hda->corb[++_hda->corb_wp]=val;
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}
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I64 HDSyncRIRB()
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{
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U16 *_w;
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I64 wp,result=0;
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_w=_hda->bar+HD_RIRBWP;
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wp=*_w;
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while (_hda->rirb_rp!=wp)
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result=_hda->rirb[++_hda->rirb_rp];
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return result;
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}
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I64 HDReadRIRB()
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{
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U16 *_w;
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I64 wp,result=0;
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_w=_hda->bar+HD_RIRBWP;
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do {
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Yield;
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wp=*_w;
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} while (wp==_hda->rirb_rp);
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result=_hda->rirb[++_hda->rirb_rp];
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return result;
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}
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I64 HDWriteCORBSync(I64 cad,I64 nid,U32 val)
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{
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HDSyncCORB;
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HDSyncRIRB;
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HDWriteCORB(cad,nid,val);
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HDSyncCORB;
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return HDReadRIRB;
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}
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Bool HDTestCORBSync(I64 cad,I64 nid,U32 val)
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{ //Checks for a response
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U16 *_w;
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U8 wp;
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HDSyncCORB;
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HDSyncRIRB;
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HDWriteCORB(cad,nid,val);
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HDSyncCORB;
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Sleep(1);
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_w=_hda->bar+HD_RIRBWP;
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wp=*_w;
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if (wp==_hda->rirb_rp)
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return FALSE;
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HDReadRIRB;
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return TRUE;
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}
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U0 HDTraverse(I64 cad,I64 nid)
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{
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I64 i,len,aud_cap,type;
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HDWriteCORBSync(cad,nid,VERB_POWER_STATE_SET+0x00); //0 is on
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HDWriteCORBSync(cad,nid,VERB_EAPDBTL_ENABLE_SET+0x02);
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HDWriteCORBSync(cad,nid,VERB_PROCESS_STATE_SET+0x02);
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HDWriteCORBSync(cad,nid,VERB_CONNECT_SELECT_SET+0x00);
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aud_cap=HDWriteCORBSync(cad,nid,VERB_GET_PARAM+P_SUBNODE_CNT);
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if (aud_cap.u16[0]) {
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for (i=aud_cap.u16[1];i<aud_cap.u16[1]+aud_cap.u16[0];i++)
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HDTraverse(cad,i);
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} else {
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aud_cap=HDWriteCORBSync(cad,nid,VERB_GET_PARAM+P_AUDIO_WIDGET_CAP);
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type=aud_cap>>20&15;
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if (Bt(&aud_cap,8))
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len=HDWriteCORBSync(cad,nid,VERB_GET_PARAM+P_CONNECT_LIST_LEN)&127;
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else
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len=0;
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HDWriteCORBSync(cad,nid,VERB_AMPLIFIER_GAIN_SET+0xF07F); //set I/O amp #0
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for (i=1;i<len;i++)
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HDWriteCORBSync(cad,nid,VERB_AMPLIFIER_GAIN_SET+0x7080+i<<8); //Set IN amps to mute
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switch (type) {
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case AWT_OUTPUT:
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if (FALSE) //if disabled
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HDWriteCORBSync(cad,nid,VERB_CHAN_STREAM_ID_SET+0x00);
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else
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HDWriteCORBSync(cad,nid,VERB_CHAN_STREAM_ID_SET+0x10);
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HDWriteCORBSync(cad,nid,VERB_STREAM_FMT_SET+HD_DFT_OUT_FMT);
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HDWriteCORBSync(cad,nid,VERB_PROCESS_STATE_SET+0x01);
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break;
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case AWT_INPUT:
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if (TRUE) //if disabled
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HDWriteCORBSync(cad,nid,VERB_CHAN_STREAM_ID_SET+0x00);
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else
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HDWriteCORBSync(cad,nid,VERB_CHAN_STREAM_ID_SET+0x20);
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HDWriteCORBSync(cad,nid,VERB_STREAM_FMT_SET+HD_DFT_IN_FMT);
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HDWriteCORBSync(cad,nid,VERB_PROCESS_STATE_SET+0x01);
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break;
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case AWT_PIN_COMPLEX:
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HDWriteCORBSync(cad,nid,VERB_PIN_WIDGET_CTL_SET+0xE2);
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break;
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}
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}
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}
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U0 HDRun(Bool in,Bool out)
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{
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U32 *_d;
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if (_hda->bar) {
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if (out) {
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_d=_hda->bar+OSTR0+STRCTL;
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*_d=0x100002;
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_hda->out_running=TRUE;
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}
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if (in) {
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_d=_hda->bar+ISTR0+STRCTL;
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*_d=0x200002;
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_hda->in_running=TRUE;
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}
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}
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}
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U0 HDStop(Bool in,Bool out)
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{
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U32 *_d;
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if (_hda->bar) {
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if (out) {
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_d=_hda->bar+OSTR0+STRCTL;
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*_d=0;
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_hda->out_running=FALSE;
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}
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if (in) {
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_d=_hda->bar+ISTR0+STRCTL;
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*_d=0;
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_hda->in_running=FALSE;
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}
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}
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}
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U0 HDSnd(F64 freq,I64 waveform=WF_SQUARE,F64 amp=1.0)
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{
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_hda->waveform=waveform;
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_hda->amp=amp;
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_hda->freq=freq;
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}
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U0 HDFillBuf(SND_OUT_CONTAINER *buf,I64)
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{
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SndWaveFillBuf(_hda->sc,buf,SND_BUF_LEN/SND_OCHANNELS,_hda->freq,_hda->waveform,snd_vol*_hda->amp);
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}
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U0 HDAudioTaskEndCB()
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{
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HDStop(FALSE,TRUE);
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fp_snd=NULL;
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SndWaveCtrlDel(_hda->sc);
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_hda->sc=NULL;
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Exit;
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}
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U0 HDAudioTask(I64)
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{
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//I didn't feel like messing around with PCI interrupts
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//so this task polls every millisecond to know when to
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//switch buffers.
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I64 next_obuf_trigger=SND_BUF_LEN*sizeof(SND_OUT_CONTAINER)/2,
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obuf_rollover=0,
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next_ibuf_trigger=SND_BUF_LEN*sizeof(SND_IN_CONTAINER),
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ibuf_rollover=0;
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U32 *pos_in_obuf=_hda->bar+OSTR0+STRLPIB,
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*pos_in_ibuf=_hda->bar+ISTR0+STRLPIB;
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Fs->task_end_cb=&HDAudioTaskEndCB;
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_hda->sc=SndWaveCtrlNew;
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_hda->freq=0;
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Snd(0);
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fp_snd=&HDSnd;
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fp_snd_fill_buf=&HDFillBuf;
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fp_snd_copy_buf=NULL;
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if (!IsSysDeterministic)
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Preempt(ON);
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snd_obuf_num=1;
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snd_ibuf_num=1;
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HDRun(FALSE,TRUE);
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_hda->audio_task_started=TRUE; //This flag is probably not necessary
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while (TRUE) {
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if (next_obuf_trigger-obuf_rollover<=*pos_in_obuf<next_obuf_trigger-obuf_rollover+(HD_POS_BUF_MULTIPLES-1)*SND_BUF_LEN*sizeof(SND_OUT_CONTAINER)) {
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next_obuf_trigger+=SND_BUF_LEN*sizeof(SND_OUT_CONTAINER);
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if (next_obuf_trigger-obuf_rollover>=HD_POS_BUF_MULTIPLES*SND_BUF_LEN*sizeof(SND_OUT_CONTAINER))
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obuf_rollover+=HD_POS_BUF_MULTIPLES*SND_BUF_LEN*sizeof(SND_OUT_CONTAINER);
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if (fp_snd_fill_buf) {
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LBts(&snd_flags,Sf_FILLING_OUT);
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(*fp_snd_fill_buf)(_hda->ostr0_buf[snd_obuf_num&1],snd_obuf_num);
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if (IsMute)
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MemSet(_hda->ostr0_buf[snd_obuf_num&1],0,SND_BUF_LEN*sizeof(SND_OUT_CONTAINER));
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else if (snd_reverb_intensity &&
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0<snd_reverb_delay<10.0)
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SndReverb(_hda->ostr0_buf[snd_obuf_num&1],snd_obuf_num);
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LBtr(&snd_flags,Sf_FILLING_OUT);
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}
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snd_obuf_num++;
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}
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if (next_ibuf_trigger-ibuf_rollover<=*pos_in_ibuf<next_ibuf_trigger-ibuf_rollover+(HD_POS_BUF_MULTIPLES-1)*SND_BUF_LEN*sizeof(SND_IN_CONTAINER)) {
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|
next_ibuf_trigger+=SND_BUF_LEN*sizeof(SND_IN_CONTAINER);
|
|
if (next_ibuf_trigger-ibuf_rollover>=HD_POS_BUF_MULTIPLES*SND_BUF_LEN*sizeof(SND_IN_CONTAINER))
|
|
ibuf_rollover+=HD_POS_BUF_MULTIPLES*SND_BUF_LEN*sizeof(SND_IN_CONTAINER);
|
|
if (fp_snd_copy_buf)
|
|
(*fp_snd_copy_buf)(_hda->istr0_buf[snd_obuf_num&1],snd_ibuf_num);
|
|
snd_ibuf_num++;
|
|
}
|
|
Sleep(1);
|
|
}
|
|
}
|
|
|
|
U0 HDRst()
|
|
{
|
|
U32 d,*_d;
|
|
HDStop(TRUE,TRUE);
|
|
_d=_hda->bar+HD_GCTL;
|
|
*_d=0; //rst
|
|
do {
|
|
Sleep(1);
|
|
d=*_d;
|
|
} while (d & 1);
|
|
*_d=1;
|
|
do {
|
|
Sleep(1);
|
|
d=*_d;
|
|
} while (!(d & 1));
|
|
Sleep(1);
|
|
}
|
|
|
|
public U0 HDAudioEnd(Bool rst=TRUE)
|
|
{
|
|
snd_dev=SD_PC_SPEAKER;
|
|
if (_hda && _hda->bar) {
|
|
Kill(_hda->task);
|
|
_hda->task=NULL;
|
|
if (rst)
|
|
HDRst;
|
|
Free(_hda->corb);
|
|
Free(_hda->rirb);
|
|
Free(_hda->ostr0_buf[0]);
|
|
Free(_hda->ostr0_buf[1]);
|
|
Free(_hda->istr0_buf[0]);
|
|
Free(_hda->istr0_buf[1]);
|
|
Free(_hda->ostr0_bdl);
|
|
Free(_hda->istr0_bdl);
|
|
Mem32DevFree(_hda->bar);
|
|
Free(_hda);
|
|
_hda=NULL;
|
|
}
|
|
}
|
|
|
|
public Bool HDAudioInit(I64 hd_bus,I64 hd_dev,I64 hd_fun)
|
|
{
|
|
I64 i;
|
|
U32 *_d;
|
|
U16 w,*_w;
|
|
U8 *_b;
|
|
if (_hda)
|
|
HDAudioEnd;
|
|
if (PCIReadU16(hd_bus,hd_dev,hd_fun,0)==0x8086 &&
|
|
(_hda=ACAlloc(sizeof(CHDAudioCtrl))) &&
|
|
(_hda->bar=Mem32DevAlloc(0x4000,0x4000)) ) {
|
|
PCIWriteU32(hd_bus,hd_dev,hd_fun,0x14,_hda->bar(I64).u32[1]);
|
|
PCIWriteU32(hd_bus,hd_dev,hd_fun,0x10,_hda->bar(I64).u32[0]);
|
|
PCIWriteU16(hd_bus,hd_dev,hd_fun,0x04,
|
|
PCIReadU16(hd_bus,hd_dev,hd_fun,0x04)|0x406);
|
|
|
|
HDRst;
|
|
|
|
_hda->corb=CAllocAligned(HD_CORB_ENTRIES*sizeof(U32),128,sys_uncached_heap);
|
|
_d=_hda->bar+HD_CORBLBASE;
|
|
*_d=_hda->corb(I64).u32[0];
|
|
_d=_hda->bar+HD_CORBUBASE;
|
|
*_d=_hda->corb(I64).u32[1];
|
|
|
|
_hda->rirb=CAllocAligned(HD_RIRB_ENTRIES*sizeof(I64),128,sys_uncached_heap);
|
|
_d=_hda->bar+HD_RIRBLBASE;
|
|
*_d=_hda->rirb(I64).u32[0];
|
|
_d=_hda->bar+HD_RIRBUBASE;
|
|
*_d=_hda->rirb(I64).u32[1];
|
|
|
|
_w=_hda->bar+HD_CORBRP;
|
|
*_w=0x8000; //Rst read ptr
|
|
do {
|
|
Yield;
|
|
w=*_w;
|
|
} while (!(w&0x8000));
|
|
*_w=0x0000; //Rst read ptr
|
|
do {
|
|
Yield;
|
|
w=*_w;
|
|
} while (w&0x8000);
|
|
|
|
_w=_hda->bar+HD_RIRBWP;
|
|
*_w=0x8000; //Rst write ptr
|
|
|
|
_b=_hda->bar+HD_CORBCTL;
|
|
*_b=0x02; //Run
|
|
_b=_hda->bar+HD_RIRBCTL;
|
|
*_b=0x02; //Run
|
|
|
|
_w=_hda->bar+HD_CORBWP;
|
|
_hda->corb_wp=*_w;
|
|
_w=_hda->bar+HD_RIRBWP;
|
|
_hda->rirb_rp=*_w;
|
|
|
|
_hda->ostr0_bdl =CAllocAligned(HD_BDL_ENTRIES*sizeof(CHDBufDesc),128,sys_uncached_heap);
|
|
_d=_hda->bar+OSTR0+STRBDPL;
|
|
*_d=_hda->ostr0_bdl(I64).u32[0];
|
|
_d=_hda->bar+OSTR0+STRBDPU;
|
|
*_d=_hda->ostr0_bdl(I64).u32[1];
|
|
for (i=0;i<2;i++) {
|
|
_hda->ostr0_bdl[i].buf=_hda->ostr0_buf[i]=CAllocAligned(SND_BUF_LEN*sizeof(SND_OUT_CONTAINER),128,sys_uncached_heap);
|
|
_hda->ostr0_bdl[i].len=SND_BUF_LEN*sizeof(SND_OUT_CONTAINER);
|
|
_hda->ostr0_bdl[i].ctrl=1;
|
|
}
|
|
|
|
_hda->istr0_bdl =CAllocAligned(HD_BDL_ENTRIES*sizeof(CHDBufDesc),128,sys_uncached_heap);
|
|
_d=_hda->bar+ISTR0+STRBDPL;
|
|
*_d=_hda->istr0_bdl(I64).u32[0];
|
|
_d=_hda->bar+ISTR0+STRBDPU;
|
|
*_d=_hda->istr0_bdl(I64).u32[1];
|
|
for (i=0;i<2;i++) {
|
|
_hda->istr0_bdl[i].buf=_hda->istr0_buf[i]=CAllocAligned(SND_BUF_LEN*sizeof(SND_IN_CONTAINER),128,sys_uncached_heap);
|
|
_hda->istr0_bdl[i].len=SND_BUF_LEN*sizeof(SND_IN_CONTAINER);
|
|
_hda->istr0_bdl[i].ctrl=1;
|
|
}
|
|
|
|
_w=_hda->bar+HD_STATESTS;
|
|
w=*_w;
|
|
while (w) {
|
|
_hda->cad=Bsf(w);
|
|
if (HDTestCORBSync(_hda->cad,0,VERB_GET_PARAM+P_SUBNODE_CNT)) {
|
|
HDTraverse(_hda->cad,0);
|
|
|
|
_d=_hda->bar+OSTR0+STRLPIB;
|
|
*_d=0;
|
|
_d=_hda->bar+OSTR0+STRCBL;
|
|
*_d=HD_POS_BUF_MULTIPLES*SND_BUF_LEN*sizeof(SND_OUT_CONTAINER);
|
|
_w=_hda->bar+OSTR0+STRLVI;
|
|
*_w=1; //last valid index
|
|
_w=_hda->bar+OSTR0+STRFMT;
|
|
*_w=HD_DFT_OUT_FMT;
|
|
|
|
_d=_hda->bar+ISTR0+STRLPIB;
|
|
*_d=0;
|
|
_d=_hda->bar+ISTR0+STRCBL;
|
|
*_d=HD_POS_BUF_MULTIPLES*SND_BUF_LEN*sizeof(SND_IN_CONTAINER);
|
|
_w=_hda->bar+ISTR0+STRLVI;
|
|
*_w=1; //last valid index
|
|
_w=_hda->bar+ISTR0+STRFMT;
|
|
*_w=HD_DFT_IN_FMT;
|
|
|
|
LBts(&sys_semas[SYS_SEMA_SND],0); //turn off until cfg completed
|
|
LBtr(&snd_flags,Sf_FILLING_OUT);
|
|
_hda->audio_task_started=FALSE;
|
|
if (mp_cnt>1)
|
|
_hda->task=MPSpawn(&HDAudioTask,NULL,"HD Audio");
|
|
else
|
|
_hda->task=Spawn(&HDAudioTask,NULL,"HD Audio");
|
|
while (!_hda->audio_task_started)
|
|
Yield;
|
|
snd_dev=SD_HD_AUDIO;
|
|
return TRUE;
|
|
}
|
|
Btr(&w,_hda->cad);
|
|
}
|
|
HDAudioEnd(FALSE);
|
|
} else {
|
|
Free(_hda);
|
|
_hda=NULL;
|
|
}
|
|
return FALSE;
|
|
}
|
|
|
|
HDAudioInit(0,27,0);
|
|
|
|
//$BK,1$Run $LK,"::/SparrowOS/Adam/Snd/HDCfg.CPP.Z","FI:::/SparrowOS/Adam/Snd/HDCfg.CPP.Z"$.$BK,0$
|
|
#help_index ""
|